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| author | Richard Henderson | 2022-06-20 19:51:51 +0200 |
|---|---|---|
| committer | Peter Maydell | 2022-06-27 12:18:17 +0200 |
| commit | d5b1223ac1ddf8f706f5e6feaaa526df8287f8b1 (patch) | |
| tree | 06dcbac7c2a8f79d89252733aee276b1f09fdc24 /target/arm/translate-a64.c | |
| parent | target/arm: Add SMCR_ELx (diff) | |
| download | qemu-d5b1223ac1ddf8f706f5e6feaaa526df8287f8b1.tar.gz qemu-d5b1223ac1ddf8f706f5e6feaaa526df8287f8b1.tar.xz qemu-d5b1223ac1ddf8f706f5e6feaaa526df8287f8b1.zip | |
target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2
Implement the streaming mode identification register, and the
two streaming priority registers. For QEMU, they are all RES0.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220620175235.60881-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
0 files changed, 0 insertions, 0 deletions