diff options
| author | Peter Maydell | 2019-06-13 18:39:06 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-06-17 16:14:19 +0200 |
| commit | d6a092d479333b5f20a647a912a31b0102d37335 (patch) | |
| tree | 7f8f03679a881548137229c3b36ca96205ba0799 /target/arm/translate-a64.h | |
| parent | hw/intc/arm_gicv3: GICD_TYPER.SecurityExtn is RAZ if GICD_CTLR.DS == 1 (diff) | |
| download | qemu-d6a092d479333b5f20a647a912a31b0102d37335.tar.gz qemu-d6a092d479333b5f20a647a912a31b0102d37335.tar.xz qemu-d6a092d479333b5f20a647a912a31b0102d37335.zip | |
target/arm: Move vfp_expand_imm() to translate.[ch]
We want to use vfp_expand_imm() in the AArch32 VFP decode;
move it from the a64-only header/source file to the
AArch32 one (which is always compiled even for AArch64).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190613163917.28589-2-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/translate-a64.h')
| -rw-r--r-- | target/arm/translate-a64.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target/arm/translate-a64.h b/target/arm/translate-a64.h index 9569bc5963..9ab40872d8 100644 --- a/target/arm/translate-a64.h +++ b/target/arm/translate-a64.h @@ -39,7 +39,6 @@ void write_fp_dreg(DisasContext *s, int reg, TCGv_i64 v); TCGv_ptr get_fpstatus_ptr(bool); bool logic_imm_decode_wmask(uint64_t *result, unsigned int immn, unsigned int imms, unsigned int immr); -uint64_t vfp_expand_imm(int size, uint8_t imm8); bool sve_access_check(DisasContext *s); /* We should have at some point before trying to access an FP register |