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| author | Peter Maydell | 2021-06-17 14:16:23 +0200 |
|---|---|---|
| committer | Peter Maydell | 2021-06-24 15:58:48 +0200 |
| commit | 1eb987a89d944515b05ccd8b913bee7fd0d547ae (patch) | |
| tree | 31bf2b162659d619269da88910f790b762b2208a /target/arm/translate-mve.c | |
| parent | target/arm: Implement MVE VQDMULL (vector) (diff) | |
| download | qemu-1eb987a89d944515b05ccd8b913bee7fd0d547ae.tar.gz qemu-1eb987a89d944515b05ccd8b913bee7fd0d547ae.tar.xz qemu-1eb987a89d944515b05ccd8b913bee7fd0d547ae.zip | |
target/arm: Implement MVE VRHADD
Implement the MVE VRHADD insn, which performs a rounded halving
addition.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210617121628.20116-40-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/translate-mve.c')
| -rw-r--r-- | target/arm/translate-mve.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c index 05789a1981..febf644079 100644 --- a/target/arm/translate-mve.c +++ b/target/arm/translate-mve.c @@ -418,6 +418,8 @@ DO_2OP(VQDMLSDH, vqdmlsdh) DO_2OP(VQDMLSDHX, vqdmlsdhx) DO_2OP(VQRDMLSDH, vqrdmlsdh) DO_2OP(VQRDMLSDHX, vqrdmlsdhx) +DO_2OP(VRHADD_S, vrhadds) +DO_2OP(VRHADD_U, vrhaddu) static bool trans_VQDMULLB(DisasContext *s, arg_2op *a) { |