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author | Peter Maydell | 2021-06-17 14:16:02 +0200 |
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committer | Peter Maydell | 2021-06-21 18:12:51 +0200 |
commit | ac6ad1dca84e39038e149c7b91adf9642e89ca70 (patch) | |
tree | 112df251c7b665916ac3dcd05bc00b92c2bb27ba /target/arm/translate-mve.c | |
parent | target/arm: Implement MVE VHADD, VHSUB (diff) | |
download | qemu-ac6ad1dca84e39038e149c7b91adf9642e89ca70.tar.gz qemu-ac6ad1dca84e39038e149c7b91adf9642e89ca70.tar.xz qemu-ac6ad1dca84e39038e149c7b91adf9642e89ca70.zip |
target/arm: Implement MVE VMULL
Implement the MVE VMULL insn, which multiplies two single
width integer elements to produce a double width result.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210617121628.20116-19-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/translate-mve.c')
-rw-r--r-- | target/arm/translate-mve.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c index f593d3693b..1cadc3b04d 100644 --- a/target/arm/translate-mve.c +++ b/target/arm/translate-mve.c @@ -361,3 +361,7 @@ DO_2OP(VHADD_S, vhadds) DO_2OP(VHADD_U, vhaddu) DO_2OP(VHSUB_S, vhsubs) DO_2OP(VHSUB_U, vhsubu) +DO_2OP(VMULL_BS, vmullbs) +DO_2OP(VMULL_BU, vmullbu) +DO_2OP(VMULL_TS, vmullts) +DO_2OP(VMULL_TU, vmulltu) |