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| author | Richard Henderson | 2021-04-16 20:31:06 +0200 |
|---|---|---|
| committer | Peter Maydell | 2021-04-30 12:16:49 +0200 |
| commit | 33e74c3172defc841692b4281d2dbd8f8a966e17 (patch) | |
| tree | b753eeab1377b2af7a0c9d444d68549020622940 /target/arm/translate-sve.c | |
| parent | target/arm: Simplify sve mte checking (diff) | |
| download | qemu-33e74c3172defc841692b4281d2dbd8f8a966e17.tar.gz qemu-33e74c3172defc841692b4281d2dbd8f8a966e17.tar.xz qemu-33e74c3172defc841692b4281d2dbd8f8a966e17.zip | |
target/arm: Remove log2_esize parameter to gen_mte_checkN
The log2_esize parameter is not used except trivially.
Drop the parameter and the deferral to gen_mte_check1.
This fixes a bug in that the parameters as documented
in the header file were the reverse from those in the
implementation. Which meant that translate-sve.c was
passing the parameters in the wrong order.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210416183106.1516563-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-sve.c')
| -rw-r--r-- | target/arm/translate-sve.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 5179c1f836..584c4d047c 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -4264,7 +4264,7 @@ static void do_ldr(DisasContext *s, uint32_t vofs, int len, int rn, int imm) dirty_addr = tcg_temp_new_i64(); tcg_gen_addi_i64(dirty_addr, cpu_reg_sp(s, rn), imm); - clean_addr = gen_mte_checkN(s, dirty_addr, false, rn != 31, len, MO_8); + clean_addr = gen_mte_checkN(s, dirty_addr, false, rn != 31, len); tcg_temp_free_i64(dirty_addr); /* @@ -4352,7 +4352,7 @@ static void do_str(DisasContext *s, uint32_t vofs, int len, int rn, int imm) dirty_addr = tcg_temp_new_i64(); tcg_gen_addi_i64(dirty_addr, cpu_reg_sp(s, rn), imm); - clean_addr = gen_mte_checkN(s, dirty_addr, false, rn != 31, len, MO_8); + clean_addr = gen_mte_checkN(s, dirty_addr, false, rn != 31, len); tcg_temp_free_i64(dirty_addr); /* Note that unpredicated load/store of vector/predicate registers |