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authorRichard Henderson2021-01-13 07:26:50 +0100
committerPeter Maydell2021-01-19 15:38:53 +0100
commit70acaafef2e053a312d54c09b6721c730690e72c (patch)
treeb25faddbaa6e4d18958978c2fff527f2bf3d9603 /target/arm/translate-sve.c
parenttarget/arm: Update ZIP, UZP, TRN for pred_desc (diff)
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target/arm: Update REV, PUNPK for pred_desc
Update all users of do_perm_pred2 for the new predicate descriptor field definitions. Cc: qemu-stable@nongnu.org Buglink: https://bugs.launchpad.net/bugs/1908551 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210113062650.593824-5-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-sve.c')
-rw-r--r--target/arm/translate-sve.c13
1 files changed, 4 insertions, 9 deletions
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 0baca176a0..27402af23c 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -2145,19 +2145,14 @@ static bool do_perm_pred2(DisasContext *s, arg_rr_esz *a, bool high_odd,
TCGv_ptr t_d = tcg_temp_new_ptr();
TCGv_ptr t_n = tcg_temp_new_ptr();
TCGv_i32 t_desc;
- int desc;
+ uint32_t desc = 0;
tcg_gen_addi_ptr(t_d, cpu_env, pred_full_reg_offset(s, a->rd));
tcg_gen_addi_ptr(t_n, cpu_env, pred_full_reg_offset(s, a->rn));
- /* Predicate sizes may be smaller and cannot use simd_desc.
- We cannot round up, as we do elsewhere, because we need
- the exact size for ZIP2 and REV. We retain the style for
- the other helpers for consistency. */
-
- desc = vsz - 2;
- desc = deposit32(desc, SIMD_DATA_SHIFT, 2, a->esz);
- desc = deposit32(desc, SIMD_DATA_SHIFT + 2, 2, high_odd);
+ desc = FIELD_DP32(desc, PREDDESC, OPRSZ, vsz);
+ desc = FIELD_DP32(desc, PREDDESC, ESZ, a->esz);
+ desc = FIELD_DP32(desc, PREDDESC, DATA, high_odd);
t_desc = tcg_const_i32(desc);
fn(t_d, t_n, t_desc);