diff options
| author | Peter Maydell | 2021-04-30 15:27:33 +0200 |
|---|---|---|
| committer | Peter Maydell | 2021-05-10 14:24:09 +0200 |
| commit | 06085d6a10e11fb9df871648668b072905936566 (patch) | |
| tree | 9be1aa7ef3410c355eec1e0d55fc1efcc5e24948 /target/arm/translate-vfp.c.inc | |
| parent | target/arm: Move gen_aa32 functions to translate-a32.h (diff) | |
| download | qemu-06085d6a10e11fb9df871648668b072905936566.tar.gz qemu-06085d6a10e11fb9df871648668b072905936566.tar.xz qemu-06085d6a10e11fb9df871648668b072905936566.zip | |
target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.inc
The functions vfp_load_reg32(), vfp_load_reg64(), vfp_store_reg32()
and vfp_store_reg64() are used only in translate-vfp.c.inc. Move
them to that file.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210430132740.10391-7-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/translate-vfp.c.inc')
| -rw-r--r-- | target/arm/translate-vfp.c.inc | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc index 500492f02f..1004d1fd09 100644 --- a/target/arm/translate-vfp.c.inc +++ b/target/arm/translate-vfp.c.inc @@ -30,6 +30,26 @@ #include "decode-vfp.c.inc" #include "decode-vfp-uncond.c.inc" +static inline void vfp_load_reg64(TCGv_i64 var, int reg) +{ + tcg_gen_ld_i64(var, cpu_env, vfp_reg_offset(true, reg)); +} + +static inline void vfp_store_reg64(TCGv_i64 var, int reg) +{ + tcg_gen_st_i64(var, cpu_env, vfp_reg_offset(true, reg)); +} + +static inline void vfp_load_reg32(TCGv_i32 var, int reg) +{ + tcg_gen_ld_i32(var, cpu_env, vfp_reg_offset(false, reg)); +} + +static inline void vfp_store_reg32(TCGv_i32 var, int reg) +{ + tcg_gen_st_i32(var, cpu_env, vfp_reg_offset(false, reg)); +} + /* * The imm8 encodes the sign bit, enough bits to represent an exponent in * the range 01....1xx to 10....0xx, and the most significant 4 bits of |