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| author | Richard Henderson | 2020-02-24 23:22:16 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-02-28 17:14:57 +0100 |
| commit | 7fbc6a403a0aab834e764fa61d81ed8586cfe352 (patch) | |
| tree | 99455bf524c7004aa9764ead4565751d98225866 /target/arm/translate-vfp.inc.c | |
| parent | cpu/arm11mpcore: Set number of GIC priority bits to 4 (diff) | |
| download | qemu-7fbc6a403a0aab834e764fa61d81ed8586cfe352.tar.gz qemu-7fbc6a403a0aab834e764fa61d81ed8586cfe352.tar.xz qemu-7fbc6a403a0aab834e764fa61d81ed8586cfe352.zip | |
target/arm: Add isar_feature_aa32_vfp_simd
Use this in the places that were checking ARM_FEATURE_VFP, and
are obviously testing for the existance of the register set
as opposed to testing for some particular instruction extension.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200224222232.13807-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-vfp.inc.c')
0 files changed, 0 insertions, 0 deletions