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| author | Richard Henderson | 2019-09-04 21:30:45 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-09-05 14:23:04 +0200 |
| commit | 2e6a646d7b1304d9106baad73c655132e2736c6c (patch) | |
| tree | 8681fe77a0e1593c583d971244d44127e333343f /target/arm/translate.c | |
| parent | target/arm: Convert T16 add, compare, move (two high registers) (diff) | |
| download | qemu-2e6a646d7b1304d9106baad73c655132e2736c6c.tar.gz qemu-2e6a646d7b1304d9106baad73c655132e2736c6c.tar.xz qemu-2e6a646d7b1304d9106baad73c655132e2736c6c.zip | |
target/arm: Convert T16 adjust sp (immediate)
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190904193059.26202-56-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate.c')
| -rw-r--r-- | target/arm/translate.c | 15 |
1 files changed, 2 insertions, 13 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index 73c8863134..8399a2c1f6 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -10765,19 +10765,8 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn) /* misc */ op = (insn >> 8) & 0xf; switch (op) { - case 0: - /* - * 0b1011_0000_xxxx_xxxx - * - ADD (SP plus immediate) - * - SUB (SP minus immediate) - */ - tmp = load_reg(s, 13); - val = (insn & 0x7f) * 4; - if (insn & (1 << 7)) - val = -(int32_t)val; - tcg_gen_addi_i32(tmp, tmp, val); - store_sp_checked(s, tmp); - break; + case 0: /* add/sub (sp, immediate), in decodetree */ + goto illegal_op; case 2: /* sign/zero extend. */ ARCH(6); |