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| author | Richard Henderson | 2020-02-16 22:42:30 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-02-21 17:07:02 +0100 |
| commit | a21bb78e5817be3f494922e1dadd6455fe5d6318 (patch) | |
| tree | 8bbb8d3d8ea518af248dfed534292152ff734a27 /target/arm/translate.c | |
| parent | target/arm: Vectorize USHL and SSHL (diff) | |
| download | qemu-a21bb78e5817be3f494922e1dadd6455fe5d6318.tar.gz qemu-a21bb78e5817be3f494922e1dadd6455fe5d6318.tar.xz qemu-a21bb78e5817be3f494922e1dadd6455fe5d6318.zip | |
target/arm: Convert PMUL.8 to gvec
The gvec form will be needed for implementing SVE2.
Extend the implementation to operate on uint64_t instead of uint32_t.
Use a counted inner loop instead of terminating when op1 goes to zero,
looking toward the required implementation for ARMv8.4-DIT.
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200216214232.4230-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate.c')
| -rw-r--r-- | target/arm/translate.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index a96104d6b4..e8f79899ca 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -5007,16 +5007,17 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) case NEON_3R_VMUL: /* VMUL */ if (u) { - /* Polynomial case allows only P8 and is handled below. */ + /* Polynomial case allows only P8. */ if (size != 0) { return 1; } + tcg_gen_gvec_3_ool(rd_ofs, rn_ofs, rm_ofs, vec_size, vec_size, + 0, gen_helper_gvec_pmul_b); } else { tcg_gen_gvec_mul(size, rd_ofs, rn_ofs, rm_ofs, vec_size, vec_size); - return 0; } - break; + return 0; case NEON_3R_VML: /* VMLA, VMLS */ tcg_gen_gvec_3(rd_ofs, rn_ofs, rm_ofs, vec_size, vec_size, @@ -5206,10 +5207,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) tmp2 = neon_load_reg(rd, pass); gen_neon_add(size, tmp, tmp2); break; - case NEON_3R_VMUL: - /* VMUL.P8; other cases already eliminated. */ - gen_helper_neon_mul_p8(tmp, tmp, tmp2); - break; case NEON_3R_VPMAX: GEN_NEON_INTEGER_OP(pmax); break; |