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authorRichard Henderson2020-11-02 17:52:13 +0100
committerPeter Maydell2020-11-02 17:52:13 +0100
commita712266f5d5a36d04b22fe69fa15592d62bed019 (patch)
tree1c07652d4fe55a6502f723134ba4e1f8ec8ec4dc /target/arm/translate.c
parenttarget/arm: Use neon_element_offset in vfp_reg_offset (diff)
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target/arm: Add read/write_neon_element32
Model these off the aa64 read/write_vec_element functions. Use it within translate-neon.c.inc. The new functions do not allocate or free temps, so this rearranges the calling code a bit. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201030022618.785675-6-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate.c')
-rw-r--r--target/arm/translate.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 88ded4ac2c..0ed9eab0b0 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1165,6 +1165,32 @@ static inline void neon_store_reg32(TCGv_i32 var, int reg)
tcg_gen_st_i32(var, cpu_env, vfp_reg_offset(false, reg));
}
+static void read_neon_element32(TCGv_i32 dest, int reg, int ele, MemOp size)
+{
+ long off = neon_element_offset(reg, ele, size);
+
+ switch (size) {
+ case MO_32:
+ tcg_gen_ld_i32(dest, cpu_env, off);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+}
+
+static void write_neon_element32(TCGv_i32 src, int reg, int ele, MemOp size)
+{
+ long off = neon_element_offset(reg, ele, size);
+
+ switch (size) {
+ case MO_32:
+ tcg_gen_st_i32(src, cpu_env, off);
+ break;
+ default:
+ g_assert_not_reached();
+ }
+}
+
static TCGv_ptr vfp_reg_ptr(bool dp, int reg)
{
TCGv_ptr ret = tcg_temp_new_ptr();