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| author | Richard Henderson | 2020-02-07 15:04:24 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-02-07 15:04:24 +0100 |
| commit | b9f6033c1a5fb7da55ed353794db8ec064f78bb2 (patch) | |
| tree | b080257e1a02574681a1ae5ae29fb43c7fea5590 /target/arm/translate.c | |
| parent | target/arm: Tidy ARMMMUIdx m-profile definitions (diff) | |
| download | qemu-b9f6033c1a5fb7da55ed353794db8ec064f78bb2.tar.gz qemu-b9f6033c1a5fb7da55ed353794db8ec064f78bb2.tar.xz qemu-b9f6033c1a5fb7da55ed353794db8ec064f78bb2.zip | |
target/arm: Reorganize ARMMMUIdx
Prepare for, but do not yet implement, the EL2&0 regime.
This involves adding the new MMUIdx enumerators and adjusting
some of the MMUIdx related predicates to match.
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200206105448.4726-20-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate.c')
| -rw-r--r-- | target/arm/translate.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c index c169984374..e11a5871d0 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -172,7 +172,6 @@ static inline int get_a32_user_mem_index(DisasContext *s) case ARMMMUIdx_MSUserNegPri: case ARMMMUIdx_MSPrivNegPri: return arm_to_core_mmu_idx(ARMMMUIdx_MSUserNegPri); - case ARMMMUIdx_Stage2: default: g_assert_not_reached(); } |