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| author | Peter Maydell | 2021-06-28 15:58:31 +0200 |
|---|---|---|
| committer | Peter Maydell | 2021-07-02 12:48:37 +0200 |
| commit | d43ebd9dc8a268195dcc8219ced96f9e3bdc4050 (patch) | |
| tree | e7ed4370dfd3b6d0ab5afc5e2a7bb003969621a6 /target/arm/translate.c | |
| parent | target/arm: Implement MVE VSHLC (diff) | |
| download | qemu-d43ebd9dc8a268195dcc8219ced96f9e3bdc4050.tar.gz qemu-d43ebd9dc8a268195dcc8219ced96f9e3bdc4050.tar.xz qemu-d43ebd9dc8a268195dcc8219ced96f9e3bdc4050.zip | |
target/arm: Implement MVE VADDLV
Implement the MVE VADDLV insn; this is similar to VADDV, except
that it accumulates 32-bit elements into a 64-bit accumulator
stored in a pair of general-purpose registers.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210628135835.6690-15-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/translate.c')
0 files changed, 0 insertions, 0 deletions