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| author | Rémi Denis-Courmont | 2021-01-08 10:08:17 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-01-12 11:04:10 +0100 |
| commit | 078e9fe3cbd6894fb6e420d8b53f304a3d5c0464 (patch) | |
| tree | 37be24c60be27af085abb6986f9d0938c8be3789 /target/arm | |
| parent | target/arm: ARMv8.4-TTST extension (diff) | |
| download | qemu-078e9fe3cbd6894fb6e420d8b53f304a3d5c0464.tar.gz qemu-078e9fe3cbd6894fb6e420d8b53f304a3d5c0464.tar.xz qemu-078e9fe3cbd6894fb6e420d8b53f304a3d5c0464.zip | |
target/arm: enable Small Translation tables in max CPU
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/cpu64.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 7cf9fc4bc6..da24f94baa 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -669,6 +669,7 @@ static void aarch64_max_initfn(Object *obj) t = cpu->isar.id_aa64mmfr2; t = FIELD_DP64(t, ID_AA64MMFR2, UAO, 1); t = FIELD_DP64(t, ID_AA64MMFR2, CNP, 1); /* TTCNP */ + t = FIELD_DP64(t, ID_AA64MMFR2, ST, 1); /* TTST */ cpu->isar.id_aa64mmfr2 = t; /* Replicate the same data to the 32-bit id registers. */ |