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| author | Richard Henderson | 2021-02-12 19:48:52 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-02-16 14:07:42 +0100 |
| commit | 2169b5c6f7a791ef9c43c72412efaafae3245114 (patch) | |
| tree | 074ba6801a01dd114e772028a87431c86f28931b /target/arm | |
| parent | linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE (diff) | |
| download | qemu-2169b5c6f7a791ef9c43c72412efaafae3245114.tar.gz qemu-2169b5c6f7a791ef9c43c72412efaafae3245114.tar.xz qemu-2169b5c6f7a791ef9c43c72412efaafae3245114.zip | |
target/arm: Improve gen_top_byte_ignore
Use simple arithmetic instead of a conditional
move when tbi0 != tbi1.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-22-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/translate-a64.c | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 1c4b8d02f3..b23a8975d5 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -183,17 +183,20 @@ static void gen_top_byte_ignore(DisasContext *s, TCGv_i64 dst, /* Sign-extend from bit 55. */ tcg_gen_sextract_i64(dst, src, 0, 56); - if (tbi != 3) { - TCGv_i64 tcg_zero = tcg_const_i64(0); - - /* - * The two TBI bits differ. - * If tbi0, then !tbi1: only use the extension if positive. - * if !tbi0, then tbi1: only use the extension if negative. - */ - tcg_gen_movcond_i64(tbi == 1 ? TCG_COND_GE : TCG_COND_LT, - dst, dst, tcg_zero, dst, src); - tcg_temp_free_i64(tcg_zero); + switch (tbi) { + case 1: + /* tbi0 but !tbi1: only use the extension if positive */ + tcg_gen_and_i64(dst, dst, src); + break; + case 2: + /* !tbi0 but tbi1: only use the extension if negative */ + tcg_gen_or_i64(dst, dst, src); + break; + case 3: + /* tbi0 and tbi1: always use the extension */ + break; + default: + g_assert_not_reached(); } } } |