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authorRichard Henderson2019-09-04 21:30:19 +0200
committerPeter Maydell2019-09-05 14:23:03 +0200
commit3949f4675d13c587078f8f423845a3a537a22595 (patch)
treee3dba58c3af9fbad0c062f1976ef4eda49d4bd0f /target/arm
parenttarget/arm: Convert LDM, STM (diff)
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target/arm: Diagnose writeback register in list for LDM for v7
Prior to v7, for the A32 encoding, this operation wrote an UNKNOWN value back to the base register. Starting in v7 this is UNPREDICTABLE. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190904193059.26202-30-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
-rw-r--r--target/arm/translate.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 1f3c7bbd54..b67e7389d3 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9997,6 +9997,15 @@ static bool do_ldm(DisasContext *s, arg_ldst_block *a)
static bool trans_LDM_a32(DisasContext *s, arg_ldst_block *a)
{
+ /*
+ * Writeback register in register list is UNPREDICTABLE
+ * for ArchVersion() >= 7. Prior to v7, A32 would write
+ * an UNKNOWN value to the base register.
+ */
+ if (ENABLE_ARCH_7 && a->w && (a->list & (1 << a->rn))) {
+ unallocated_encoding(s);
+ return true;
+ }
return do_ldm(s, a);
}