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| author | Richard Henderson | 2021-11-03 05:03:43 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-12-15 11:35:26 +0100 |
| commit | 3b39ba360d5606c8a321e611ad855891b13d08cf (patch) | |
| tree | a67b5fd8a562903129564a9cee3b6447e7dd38a1 /target/arm | |
| parent | hw/intc/arm_gicv3: Introduce CONFIG_ARM_GIC_TCG Kconfig selector (diff) | |
| download | qemu-3b39ba360d5606c8a321e611ad855891b13d08cf.tar.gz qemu-3b39ba360d5606c8a321e611ad855891b13d08cf.tar.xz qemu-3b39ba360d5606c8a321e611ad855891b13d08cf.zip | |
target/arm: Hoist pc_next to a local variable in aarch64_tr_translate_insn
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/translate-a64.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index cec672f229..9c4258ccac 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -14750,6 +14750,7 @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *s = container_of(dcbase, DisasContext, base); CPUARMState *env = cpu->env_ptr; + uint64_t pc = s->base.pc_next; uint32_t insn; if (s->ss_active && !s->pstate_ss) { @@ -14769,10 +14770,10 @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) return; } - s->pc_curr = s->base.pc_next; - insn = arm_ldl_code(env, &s->base, s->base.pc_next, s->sctlr_b); + s->pc_curr = pc; + insn = arm_ldl_code(env, &s->base, pc, s->sctlr_b); s->insn = insn; - s->base.pc_next += 4; + s->base.pc_next = pc + 4; s->fp_access_checked = false; s->sve_access_checked = false; |