diff options
| author | Richard Henderson | 2021-02-12 19:48:57 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-02-16 14:16:56 +0100 |
| commit | 8db94ab4e5db798b29ad73aad42af0da9c09ec35 (patch) | |
| tree | aa1867013bc5c902f2e54b8062e34999d999a62a /target/arm | |
| parent | target/arm: Split out syndrome.h from internals.h (diff) | |
| download | qemu-8db94ab4e5db798b29ad73aad42af0da9c09ec35.tar.gz qemu-8db94ab4e5db798b29ad73aad42af0da9c09ec35.tar.xz qemu-8db94ab4e5db798b29ad73aad42af0da9c09ec35.zip | |
linux-user/aarch64: Pass syndrome to EXC_*_ABORT
A proper syndrome is required to fill in the proper si_code.
Use page_get_flags to determine permission vs translation for user-only.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-27-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/tlb_helper.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c index df85079d9f..9609333cbd 100644 --- a/target/arm/tlb_helper.c +++ b/target/arm/tlb_helper.c @@ -154,21 +154,24 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size, bool probe, uintptr_t retaddr) { ARMCPU *cpu = ARM_CPU(cs); + ARMMMUFaultInfo fi = {}; #ifdef CONFIG_USER_ONLY - cpu->env.exception.vaddress = address; - if (access_type == MMU_INST_FETCH) { - cs->exception_index = EXCP_PREFETCH_ABORT; + int flags = page_get_flags(useronly_clean_ptr(address)); + if (flags & PAGE_VALID) { + fi.type = ARMFault_Permission; } else { - cs->exception_index = EXCP_DATA_ABORT; + fi.type = ARMFault_Translation; } - cpu_loop_exit_restore(cs, retaddr); + + /* now we have a real cpu fault */ + cpu_restore_state(cs, retaddr, true); + arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi); #else hwaddr phys_addr; target_ulong page_size; int prot, ret; MemTxAttrs attrs = {}; - ARMMMUFaultInfo fi = {}; ARMCacheAttrs cacheattrs = {}; /* |