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author | Philippe Mathieu-Daudé | 2021-10-30 01:18:31 +0200 |
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committer | Richard Henderson | 2021-11-02 19:14:55 +0100 |
commit | daf7a1814feec8a52481a695c2b9f0b9c71f0d46 (patch) | |
tree | c22058f0d66a4f202eb83c36adcf21c9c3973c15 /target/arm | |
parent | target/arm: Use tcg_constant_i32() in op_smlad() (diff) | |
download | qemu-daf7a1814feec8a52481a695c2b9f0b9c71f0d46.tar.gz qemu-daf7a1814feec8a52481a695c2b9f0b9c71f0d46.tar.xz qemu-daf7a1814feec8a52481a695c2b9f0b9c71f0d46.zip |
target/arm: Introduce store_cpu_field_constant() helper
Similarly to the store_cpu_field() helper which takes a TCG
temporary, store its value to the CPUState, introduce the
store_cpu_field_constant() helper which store a constant to
CPUState (without using any TCG temporary).
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029231834.2476117-3-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/arm')
-rw-r--r-- | target/arm/translate-a32.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/arm/translate-a32.h b/target/arm/translate-a32.h index 88f15df60e..17af8dc95a 100644 --- a/target/arm/translate-a32.h +++ b/target/arm/translate-a32.h @@ -70,6 +70,9 @@ static inline void store_cpu_offset(TCGv_i32 var, int offset) #define store_cpu_field(var, name) \ store_cpu_offset(var, offsetof(CPUARMState, name)) +#define store_cpu_field_constant(val, name) \ + tcg_gen_st_i32(tcg_constant_i32(val), cpu_env, offsetof(CPUARMState, name)) + /* Create a new temporary and set it to the value of a CPU register. */ static inline TCGv_i32 load_reg(DisasContext *s, int reg) { |