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| author | Richard Henderson | 2021-02-12 19:49:01 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-02-16 14:17:22 +0100 |
| commit | e32328645ed6fc4f20f0164dfc9ce1bf7e667cc4 (patch) | |
| tree | 18f2f5c6d48f1dd9bf9be6710327dfd9c51e468c /target/arm | |
| parent | target/arm: Add allocation tag storage for user mode (diff) | |
| download | qemu-e32328645ed6fc4f20f0164dfc9ce1bf7e667cc4.tar.gz qemu-e32328645ed6fc4f20f0164dfc9ce1bf7e667cc4.tar.xz qemu-e32328645ed6fc4f20f0164dfc9ce1bf7e667cc4.zip | |
target/arm: Enable MTE for user-only
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210212184902.1251044-31-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/cpu.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 70cfcbc918..b8bc89e71f 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -209,6 +209,21 @@ static void arm_cpu_reset(DeviceState *dev) * Note that this must match useronly_clean_ptr. */ env->cp15.tcr_el[1].raw_tcr = (1ULL << 37); + + /* Enable MTE */ + if (cpu_isar_feature(aa64_mte, cpu)) { + /* Enable tag access, but leave TCF0 as No Effect (0). */ + env->cp15.sctlr_el[1] |= SCTLR_ATA0; + /* + * Exclude all tags, so that tag 0 is always used. + * This corresponds to Linux current->thread.gcr_incl = 0. + * + * Set RRND, so that helper_irg() will generate a seed later. + * Here in cpu_reset(), the crypto subsystem has not yet been + * initialized. + */ + env->cp15.gcr_el1 = 0x1ffff; + } #else /* Reset into the highest available EL */ if (arm_feature(env, ARM_FEATURE_EL3)) { |