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author | Claudio Fontana | 2021-02-04 17:39:23 +0100 |
---|---|---|
committer | Richard Henderson | 2021-02-05 21:24:15 +0100 |
commit | 78271684719f34c1cc19f895e089f2f19b69698d (patch) | |
tree | 5f47406eb8c2be4e37e411e5053678e4d91e09d3 /target/avr | |
parent | cpu: move debug_check_watchpoint to tcg_ops (diff) | |
download | qemu-78271684719f34c1cc19f895e089f2f19b69698d.tar.gz qemu-78271684719f34c1cc19f895e089f2f19b69698d.tar.xz qemu-78271684719f34c1cc19f895e089f2f19b69698d.zip |
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
we cannot in principle make the TCG Operations field definitions
conditional on CONFIG_TCG in code that is included by both common_ss
and specific_ss modules.
Therefore, what we can do safely to restrict the TCG fields to TCG-only
builds, is to move all tcg cpu operations into a separate header file,
which is only included by TCG, target-specific code.
This leaves just a NULL pointer in the cpu.h for the non-TCG builds.
This also tidies up the code in all targets a bit, having all TCG cpu
operations neatly contained by a dedicated data struct.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20210204163931.7358-16-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/avr')
-rw-r--r-- | target/avr/cpu.c | 19 | ||||
-rw-r--r-- | target/avr/helper.c | 5 |
2 files changed, 17 insertions, 7 deletions
diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 476e645b37..fa0f8e0e80 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -184,6 +184,19 @@ static void avr_cpu_dump_state(CPUState *cs, FILE *f, int flags) qemu_fprintf(f, "\n"); } +#include "hw/core/tcg-cpu-ops.h" + +static struct TCGCPUOps avr_tcg_ops = { + .initialize = avr_cpu_tcg_init, + .synchronize_from_tb = avr_cpu_synchronize_from_tb, + .cpu_exec_interrupt = avr_cpu_exec_interrupt, + .tlb_fill = avr_cpu_tlb_fill, + +#ifndef CONFIG_USER_ONLY + .do_interrupt = avr_cpu_do_interrupt, +#endif /* !CONFIG_USER_ONLY */ +}; + static void avr_cpu_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); @@ -198,21 +211,17 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) cc->class_by_name = avr_cpu_class_by_name; cc->has_work = avr_cpu_has_work; - cc->tcg_ops.do_interrupt = avr_cpu_do_interrupt; - cc->tcg_ops.cpu_exec_interrupt = avr_cpu_exec_interrupt; cc->dump_state = avr_cpu_dump_state; cc->set_pc = avr_cpu_set_pc; cc->memory_rw_debug = avr_cpu_memory_rw_debug; cc->get_phys_page_debug = avr_cpu_get_phys_page_debug; - cc->tcg_ops.tlb_fill = avr_cpu_tlb_fill; cc->vmsd = &vms_avr_cpu; cc->disas_set_info = avr_cpu_disas_set_info; - cc->tcg_ops.initialize = avr_cpu_tcg_init; - cc->tcg_ops.synchronize_from_tb = avr_cpu_synchronize_from_tb; cc->gdb_read_register = avr_cpu_gdb_read_register; cc->gdb_write_register = avr_cpu_gdb_write_register; cc->gdb_num_core_regs = 35; cc->gdb_core_xml_file = "avr-cpu.xml"; + cc->tcg_ops = &avr_tcg_ops; } /* diff --git a/target/avr/helper.c b/target/avr/helper.c index 69d3b6181f..65880b9928 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" +#include "hw/core/tcg-cpu-ops.h" #include "exec/exec-all.h" #include "exec/address-spaces.h" #include "exec/helper-proto.h" @@ -34,7 +35,7 @@ bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) if (interrupt_request & CPU_INTERRUPT_RESET) { if (cpu_interrupts_enabled(env)) { cs->exception_index = EXCP_RESET; - cc->tcg_ops.do_interrupt(cs); + cc->tcg_ops->do_interrupt(cs); cs->interrupt_request &= ~CPU_INTERRUPT_RESET; @@ -45,7 +46,7 @@ bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) if (cpu_interrupts_enabled(env) && env->intsrc != 0) { int index = ctz32(env->intsrc); cs->exception_index = EXCP_INT(index); - cc->tcg_ops.do_interrupt(cs); + cc->tcg_ops->do_interrupt(cs); env->intsrc &= env->intsrc - 1; /* clear the interrupt */ cs->interrupt_request &= ~CPU_INTERRUPT_HARD; |