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authorPhilippe Mathieu-Daudé2021-01-28 01:32:22 +0100
committerEdgar E. Iglesias2021-02-22 09:04:58 +0100
commitc0ff662fabb9bbf79c6518d34f6163567aa4ab44 (patch)
tree3583dbbe6a89f6ee1ecb8125902db3bfc504e181 /target/cris/helper.c
parentMerge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210221' into ... (diff)
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target/cris: Use MMUAccessType enum type when possible
Replace the 0/1/2 magic values by the corresponding MMUAccessType. We can remove a comment as enum names are self explicit. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-Id: <20210128003223.3561108-2-f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/cris/helper.c')
-rw-r--r--target/cris/helper.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/cris/helper.c b/target/cris/helper.c
index 7e3bb58fe1..911867f3b4 100644
--- a/target/cris/helper.c
+++ b/target/cris/helper.c
@@ -275,10 +275,10 @@ hwaddr cris_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
struct cris_mmu_result res;
int miss;
- miss = cris_mmu_translate(&res, &cpu->env, addr, 0, 0, 1);
+ miss = cris_mmu_translate(&res, &cpu->env, addr, MMU_DATA_LOAD, 0, 1);
/* If D TLB misses, try I TLB. */
if (miss) {
- miss = cris_mmu_translate(&res, &cpu->env, addr, 2, 0, 1);
+ miss = cris_mmu_translate(&res, &cpu->env, addr, MMU_INST_FETCH, 0, 1);
}
if (!miss) {