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author | Peter Maydell | 2021-02-18 17:33:36 +0100 |
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committer | Peter Maydell | 2021-02-18 17:33:36 +0100 |
commit | c79f01c9450bcf90c08a77f13fbf67bdba59a316 (patch) | |
tree | aed02be84b9b5caffdaa4ad28655e814724eafd7 /target/hexagon/cpu_bits.h | |
parent | Merge remote-tracking branch 'remotes/kraxel/tags/usb-20210218-pull-request' ... (diff) | |
parent | Hexagon build infrastructure (diff) | |
download | qemu-c79f01c9450bcf90c08a77f13fbf67bdba59a316.tar.gz qemu-c79f01c9450bcf90c08a77f13fbf67bdba59a316.tar.xz qemu-c79f01c9450bcf90c08a77f13fbf67bdba59a316.zip |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210218' into staging
Initial commit for the Qualcomm Hexagon processor.
# gpg: Signature made Thu 18 Feb 2021 16:26:52 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-hex-20210218: (35 commits)
Hexagon build infrastructure
Hexagon (tests/tcg/hexagon) TCG tests - floating point
Hexagon (tests/tcg/hexagon) TCG tests - atomics/load/store/misc
Hexagon (tests/tcg/hexagon) TCG tests - multiarch
Hexagon (linux-user/hexagon) Linux user emulation
Hexagon (target/hexagon) translation
Hexagon (target/hexagon) TCG for floating point instructions
Hexagon (target/hexagon) TCG for instructions with multiple definitions
Hexagon (target/hexagon) TCG generation
Hexagon (target/hexagon) instruction classes
Hexagon (target/hexagon) macros
Hexagon (target/hexagon) opcode data structures
Hexagon (target/hexagon) generater phase 4 - decode tree
Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree
Hexagon (target/hexagon) generator phase 2 - generate header files
Hexagon (target/hexagon) generator phase 1 - C preprocessor for semantics
Hexagon (target/hexagon/imported) arch import
Hexagon (target/hexagon/fma_emu.[ch]) utility functions
Hexagon (target/hexagon/conv_emu.[ch]) utility functions
Hexagon (target/hexagon/arch.[ch]) utility functions
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/hexagon/cpu_bits.h')
-rw-r--r-- | target/hexagon/cpu_bits.h | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/target/hexagon/cpu_bits.h b/target/hexagon/cpu_bits.h new file mode 100644 index 0000000000..96af834d0e --- /dev/null +++ b/target/hexagon/cpu_bits.h @@ -0,0 +1,58 @@ +/* + * Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef HEXAGON_CPU_BITS_H +#define HEXAGON_CPU_BITS_H + +#include "qemu/bitops.h" + +#define HEX_EXCP_FETCH_NO_UPAGE 0x012 +#define HEX_EXCP_INVALID_PACKET 0x015 +#define HEX_EXCP_INVALID_OPCODE 0x015 +#define HEX_EXCP_PRIV_NO_UREAD 0x024 +#define HEX_EXCP_PRIV_NO_UWRITE 0x025 + +#define HEX_EXCP_TRAP0 0x172 + +#define PACKET_WORDS_MAX 4 + +static inline uint32_t parse_bits(uint32_t encoding) +{ + /* The parse bits are [15:14] */ + return extract32(encoding, 14, 2); +} + +static inline uint32_t iclass_bits(uint32_t encoding) +{ + /* The instruction class is encoded in bits [31:28] */ + uint32_t iclass = extract32(encoding, 28, 4); + /* If parse bits are zero, this is a duplex */ + if (parse_bits(encoding) == 0) { + iclass += 16; + } + return iclass; +} + +static inline int is_packet_end(uint32_t endocing) +{ + uint32_t bits = parse_bits(endocing); + return ((bits == 0x3) || (bits == 0x0)); +} + +int disassemble_hexagon(uint32_t *words, int nwords, bfd_vma pc, GString *buf); + +#endif |