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authorTaylor Simpson2021-04-09 03:07:33 +0200
committerRichard Henderson2021-05-01 17:31:43 +0200
commit743debbc373ffcd8eb66dc388632c03f5e951bfc (patch)
treeed61b597ead9f05a8fa5dd75d9bc163d66856a1c /target/hexagon/translate.h
parentHexagon (target/hexagon) use env_archcpu and env_cpu (diff)
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Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN
When exiting a TB, generate all the code before returning from hexagon_tr_translate_packet so that nothing needs to be done in hexagon_tr_tb_stop. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1617930474-31979-6-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hexagon/translate.h')
-rw-r--r--target/hexagon/translate.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/target/hexagon/translate.h b/target/hexagon/translate.h
index 938f7fbb9f..12506c8caf 100644
--- a/target/hexagon/translate.h
+++ b/target/hexagon/translate.h
@@ -86,8 +86,5 @@ extern TCGv hex_llsc_addr;
extern TCGv hex_llsc_val;
extern TCGv_i64 hex_llsc_val_i64;
-void gen_exception(int excp);
-void gen_exception_debug(void);
-
void process_store(DisasContext *ctx, Packet *pkt, int slot_num);
#endif