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| author | Taylor Simpson | 2022-07-19 01:03:18 +0200 |
|---|---|---|
| committer | Taylor Simpson | 2022-08-01 01:22:09 +0200 |
| commit | 1e814a0dc4b255a58f2cdab54aee50b25af2a006 (patch) | |
| tree | 255d9c271f509e259632f6375d3b10f36c1c500b /target/hexagon | |
| parent | Merge tag 'pull-la-20220729' of https://gitlab.com/rth7680/qemu into staging (diff) | |
| download | qemu-1e814a0dc4b255a58f2cdab54aee50b25af2a006.tar.gz qemu-1e814a0dc4b255a58f2cdab54aee50b25af2a006.tar.xz qemu-1e814a0dc4b255a58f2cdab54aee50b25af2a006.zip | |
Hexagon (target/hexagon) make VyV operands use a unique temp
VyV operand is only used in the vshuff and vdeal instructions. These
instructions write to both VyV and VxV operands. In the case where
both operands are the same register, we need a separate location for
VyV. We use the existing vtmp field in CPUHexagonState.
Test case added in tests/tcg/hexagon/hvx_misc.c
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220718230320.24444-2-tsimpson@quicinc.com>
Diffstat (limited to 'target/hexagon')
| -rwxr-xr-x | target/hexagon/gen_tcg_funcs.py | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/target/hexagon/gen_tcg_funcs.py b/target/hexagon/gen_tcg_funcs.py index 1fd9de95d5..d72c689ad7 100755 --- a/target/hexagon/gen_tcg_funcs.py +++ b/target/hexagon/gen_tcg_funcs.py @@ -1,7 +1,7 @@ #!/usr/bin/env python3 ## -## Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved. +## Copyright(c) 2019-2022 Qualcomm Innovation Center, Inc. All Rights Reserved. ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -164,7 +164,9 @@ def genptr_decl(f, tag, regtype, regid, regno): (regtype, regid, regno)) f.write(" const intptr_t %s%sV_off =\n" % \ (regtype, regid)) - if (hex_common.is_tmp_result(tag)): + if (regid == "y"): + f.write(" offsetof(CPUHexagonState, vtmp);\n") + elif (hex_common.is_tmp_result(tag)): f.write(" ctx_tmp_vreg_off(ctx, %s%sN, 1, true);\n" % \ (regtype, regid)) else: @@ -379,9 +381,6 @@ def genptr_src_read(f, tag, regtype, regid): f.write(" vreg_src_off(ctx, %s%sN),\n" % \ (regtype, regid)) f.write(" sizeof(MMVector), sizeof(MMVector));\n") - if (not hex_common.skip_qemu_helper(tag)): - f.write(" tcg_gen_addi_ptr(%s%sV, cpu_env, %s%sV_off);\n" % \ - (regtype, regid, regtype, regid)) else: print("Bad register parse: ", regtype, regid) elif (regtype == "Q"): |