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authorRichard Henderson2022-08-15 22:16:06 +0200
committerRichard Henderson2022-10-04 21:13:12 +0200
commitfbf59aad178d98afe193fa872a2d880266a75269 (patch)
tree05d5fb4a7118f1a70eb0a09a1269f859f822502e /target/hexagon
parenthw/core: Add CPUClass.get_pc (diff)
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accel/tcg: Introduce tb_pc and log_pc
The availability of tb->pc will shortly be conditional. Introduce accessor functions to minimize ifdefs. Pass around a known pc to places like tcg_gen_code, where the caller must already have the value. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/hexagon')
-rw-r--r--target/hexagon/cpu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 04a497db5e..fa6d722555 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -263,7 +263,7 @@ static void hexagon_cpu_synchronize_from_tb(CPUState *cs,
{
HexagonCPU *cpu = HEXAGON_CPU(cs);
CPUHexagonState *env = &cpu->env;
- env->gpr[HEX_REG_PC] = tb->pc;
+ env->gpr[HEX_REG_PC] = tb_pc(tb);
}
static bool hexagon_cpu_has_work(CPUState *cs)