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| author | Peter Maydell | 2021-02-19 11:59:04 +0100 |
|---|---|---|
| committer | Peter Maydell | 2021-02-19 11:59:04 +0100 |
| commit | 6de76c5f324904c93e69f9a1e8e4fd0bd6f6b57a (patch) | |
| tree | 090f945eec21f203585aa44247977a73f13658fc /target/i386/cpu.h | |
| parent | Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210218' into... (diff) | |
| parent | hostmem: Don't report pmem attribute if unsupported (diff) | |
| download | qemu-6de76c5f324904c93e69f9a1e8e4fd0bd6f6b57a.tar.gz qemu-6de76c5f324904c93e69f9a1e8e4fd0bd6f6b57a.tar.xz qemu-6de76c5f324904c93e69f9a1e8e4fd0bd6f6b57a.zip | |
Merge remote-tracking branch 'remotes/ehabkost-gl/tags/machine-next-pull-request' into staging
Machine and x86 queue, 2021-02-18
Feature:
* i386: Add the support for AMD EPYC 3rd generation processors
(Babu Moger)
Bug fix:
* hostmem: Don't report pmem attribute if unsupported
(Michal Privoznik)
Cleanup:
* device-crash-test: Remove problematic language
(Eduardo Habkost)
# gpg: Signature made Thu 18 Feb 2021 23:34:58 GMT
# gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6
# gpg: issuer "ehabkost@redhat.com"
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost-gl/tags/machine-next-pull-request:
hostmem: Don't report pmem attribute if unsupported
device-crash-test: Remove problematic language
i386: Add the support for AMD EPYC 3rd generation processors
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/i386/cpu.h')
| -rw-r--r-- | target/i386/cpu.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 82c1ac00ef..8be39cfb62 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -817,8 +817,12 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_8000_0008_EBX_WBNOINVD (1U << 9) /* Indirect Branch Prediction Barrier */ #define CPUID_8000_0008_EBX_IBPB (1U << 12) +/* Indirect Branch Restricted Speculation */ +#define CPUID_8000_0008_EBX_IBRS (1U << 14) /* Single Thread Indirect Branch Predictors */ #define CPUID_8000_0008_EBX_STIBP (1U << 15) +/* Speculative Store Bypass Disable */ +#define CPUID_8000_0008_EBX_AMD_SSBD (1U << 24) #define CPUID_XSAVE_XSAVEOPT (1U << 0) #define CPUID_XSAVE_XSAVEC (1U << 1) |