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authorCameron Esfahani2019-11-24 21:05:24 +0100
committerPaolo Bonzini2019-11-26 09:58:35 +0100
commit9fedbbeeee6dead7e73b3a53e3c80dd37392b464 (patch)
tree630afda3f45ad0a7544886a3da6465439d4cab10 /target/i386/hvf/x86_emu.c
parenthvf: non-RAM, non-ROMD memory ranges are now correctly mapped in (diff)
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hvf: remove TSC synchronization code because it isn't fully complete
The existing code in QEMU's HVF support to attempt to synchronize TSC across multiple cores is not sufficient. TSC value on other cores can go backwards. Until implementation is fixed, remove calls to hv_vm_sync_tsc(). Pass through TSC to guest OS. Signed-off-by: Cameron Esfahani <dirty@apple.com> Message-Id: <44c4afd2301b8bf99682b229b0796d84edd6d66f.1574625592.git.dirty@apple.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/i386/hvf/x86_emu.c')
-rw-r--r--target/i386/hvf/x86_emu.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/target/i386/hvf/x86_emu.c b/target/i386/hvf/x86_emu.c
index 1b04bd7e94..3df767209d 100644
--- a/target/i386/hvf/x86_emu.c
+++ b/target/i386/hvf/x86_emu.c
@@ -772,9 +772,6 @@ void simulate_wrmsr(struct CPUState *cpu)
switch (msr) {
case MSR_IA32_TSC:
- /* if (!osx_is_sierra())
- wvmcs(cpu->hvf_fd, VMCS_TSC_OFFSET, data - rdtscp());
- hv_vm_sync_tsc(data);*/
break;
case MSR_IA32_APICBASE:
cpu_set_apic_base(X86_CPU(cpu)->apic_state, data);