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author | Mark Cave-Ayland | 2021-05-19 16:29:17 +0200 |
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committer | Laurent Vivier | 2021-05-26 20:45:18 +0200 |
commit | 5e50c6c72bf8575f124ec9397411f4a2ff0d0206 (patch) | |
tree | 55651406bbf6c39962c5405995c00f1bd1b21a58 /target/m68k/cpu.h | |
parent | target/m68k: introduce gen_singlestep_exception() function (diff) | |
download | qemu-5e50c6c72bf8575f124ec9397411f4a2ff0d0206.tar.gz qemu-5e50c6c72bf8575f124ec9397411f4a2ff0d0206.tar.xz qemu-5e50c6c72bf8575f124ec9397411f4a2ff0d0206.zip |
target/m68k: implement m68k "any instruction" trace mode
The m68k trace mode is controlled by the top 2 bits in the SR register. Implement
the m68k "any instruction" trace mode where bit T1=1 and bit T0=0 in which the CPU
generates an EXCP_TRACE exception (vector 9 or offset 0x24) after executing each
instruction.
This functionality is used by the NetBSD kernel debugger to allow single-stepping
on m68k architectures.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210519142917.16693-5-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'target/m68k/cpu.h')
-rw-r--r-- | target/m68k/cpu.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 402c86c876..997d588911 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -230,6 +230,9 @@ typedef enum { #define SR_T_SHIFT 14 #define SR_T 0xc000 +#define M68K_SR_TRACE(sr) ((sr & SR_T) >> SR_T_SHIFT) +#define M68K_SR_TRACE_ANY_INS 0x2 + #define M68K_SSP 0 #define M68K_USP 1 #define M68K_ISP 2 @@ -590,6 +593,8 @@ typedef M68kCPU ArchCPU; #define TB_FLAGS_SFC_S (1 << TB_FLAGS_SFC_S_BIT) #define TB_FLAGS_DFC_S_BIT 15 #define TB_FLAGS_DFC_S (1 << TB_FLAGS_DFC_S_BIT) +#define TB_FLAGS_TRACE 16 +#define TB_FLAGS_TRACE_BIT (1 << TB_FLAGS_TRACE) static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *flags) @@ -602,6 +607,9 @@ static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc, *flags |= (env->sfc << (TB_FLAGS_SFC_S_BIT - 2)) & TB_FLAGS_SFC_S; *flags |= (env->dfc << (TB_FLAGS_DFC_S_BIT - 2)) & TB_FLAGS_DFC_S; } + if (M68K_SR_TRACE(env->sr) == M68K_SR_TRACE_ANY_INS) { + *flags |= TB_FLAGS_TRACE; + } } void dump_mmu(CPUM68KState *env); |