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| author | Edgar E. Iglesias | 2018-04-14 17:59:29 +0200 |
|---|---|---|
| committer | Edgar E. Iglesias | 2018-05-29 09:35:14 +0200 |
| commit | 0a22f8cf3ec1716865d635688fbfb31402c0ba7a (patch) | |
| tree | 96d7d48ecaf55af2f6debf9c3a3960b291418945 /target/microblaze/cpu.h | |
| parent | target-microblaze: dec_msr: Fix MTS to FSR (diff) | |
| download | qemu-0a22f8cf3ec1716865d635688fbfb31402c0ba7a.tar.gz qemu-0a22f8cf3ec1716865d635688fbfb31402c0ba7a.tar.xz qemu-0a22f8cf3ec1716865d635688fbfb31402c0ba7a.zip | |
target-microblaze: Make special registers 64-bit
Extend special registers to 64-bits. This is in preparation for
MFSE/MTSE, moves to and from extended special registers.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze/cpu.h')
| -rw-r--r-- | target/microblaze/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 1593496997..215f42b384 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -243,7 +243,7 @@ struct CPUMBState { uint32_t imm; uint32_t regs[32]; - uint32_t sregs[14]; + uint64_t sregs[14]; float_status fp_status; /* Stack protectors. Yes, it's a hw feature. */ uint32_t slr, shr; |