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| author | Philippe Mathieu-Daudé | 2020-11-30 14:03:31 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé | 2021-01-14 17:13:53 +0100 |
| commit | 810fda17c8ea9b93f7c2bcc48e70cf7a3dbc7e91 (patch) | |
| tree | 0914605a534ece93a20a33a8885a29b0c73153bc /target/mips/cpu-defs.c.inc | |
| parent | target/mips: Remove CPUMIPSState* argument from gen_msa*() methods (diff) | |
| download | qemu-810fda17c8ea9b93f7c2bcc48e70cf7a3dbc7e91.tar.gz qemu-810fda17c8ea9b93f7c2bcc48e70cf7a3dbc7e91.tar.xz qemu-810fda17c8ea9b93f7c2bcc48e70cf7a3dbc7e91.zip | |
target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V/BxZ()
In preparation of using the decodetree script, explode
gen_msa_branch() as following:
- OPC_BZ_V -> BxZ_V(EQ)
- OPC_BNZ_V -> BxZ_V(NE)
- OPC_BZ_[BHWD] -> BxZ(false)
- OPC_BNZ_[BHWD] -> BxZ(true)
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20201208003702.4088927-10-f4bug@amsat.org>
Diffstat (limited to 'target/mips/cpu-defs.c.inc')
0 files changed, 0 insertions, 0 deletions