diff options
| author | Philippe Mathieu-Daudé | 2021-10-03 18:10:35 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé | 2021-10-18 00:41:36 +0200 |
| commit | 469a316dc42cd669ab502a385fdd3539fd45e36e (patch) | |
| tree | 57213f67231b13c75fe4887363fc88d617882126 /target/mips/tcg/msa_translate.c | |
| parent | target/mips: Use tcg_constant_i32() in gen_msa_3rf() (diff) | |
| download | qemu-469a316dc42cd669ab502a385fdd3539fd45e36e.tar.gz qemu-469a316dc42cd669ab502a385fdd3539fd45e36e.tar.xz qemu-469a316dc42cd669ab502a385fdd3539fd45e36e.zip | |
target/mips: Use explicit extract32() calls in gen_msa_i5()
We already use sextract32(), use extract32() for completeness
instead of open-coding it.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211003175743.3738710-7-f4bug@amsat.org>
Diffstat (limited to 'target/mips/tcg/msa_translate.c')
| -rw-r--r-- | target/mips/tcg/msa_translate.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c index e107cad57e..3ef912da6b 100644 --- a/target/mips/tcg/msa_translate.c +++ b/target/mips/tcg/msa_translate.c @@ -473,15 +473,12 @@ static void gen_msa_i8(DisasContext *ctx) static void gen_msa_i5(DisasContext *ctx) { #define MASK_MSA_I5(op) (MASK_MSA_MINOR(op) | (op & (0x7 << 23))) - uint8_t df = (ctx->opcode >> 21) & 0x3; int8_t s5 = (int8_t) sextract32(ctx->opcode, 16, 5); - uint8_t u5 = (ctx->opcode >> 16) & 0x1f; - uint8_t ws = (ctx->opcode >> 11) & 0x1f; - uint8_t wd = (ctx->opcode >> 6) & 0x1f; + uint8_t u5 = extract32(ctx->opcode, 16, 5); - TCGv_i32 tdf = tcg_const_i32(df); - TCGv_i32 twd = tcg_const_i32(wd); - TCGv_i32 tws = tcg_const_i32(ws); + TCGv_i32 tdf = tcg_const_i32(extract32(ctx->opcode, 21, 2)); + TCGv_i32 twd = tcg_const_i32(extract32(ctx->opcode, 11, 5)); + TCGv_i32 tws = tcg_const_i32(extract32(ctx->opcode, 6, 5)); TCGv_i32 timm = tcg_temp_new_i32(); tcg_gen_movi_i32(timm, u5); |