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authorPhilippe Mathieu-Daudé2021-08-15 15:46:09 +0200
committerPhilippe Mathieu-Daudé2021-08-25 13:02:14 +0200
commita1b4b060d756dbc2d221d340b7adbc3e694e06d6 (patch)
tree811056600c83f53cae127b961e90e0189d314a87 /target/mips/tcg/translate.c
parenttarget/mips: Simplify gen_helper() macros by using tcg_constant_i32() (diff)
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target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macros
gen_helper_1e1i() is one-line long and is used in one place: simply inline it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210816205107.2051495-6-f4bug@amsat.org>
Diffstat (limited to 'target/mips/tcg/translate.c')
-rw-r--r--target/mips/tcg/translate.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 3417fc433f..db7fc75d93 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -1225,10 +1225,6 @@ TCGv_i64 fpu_f64[32];
gen_helper_##name(ret, cpu_env, tcg_constant_i32(arg1)); \
} while (0)
-#define gen_helper_1e1i(name, ret, arg1, arg2) do { \
- gen_helper_##name(ret, cpu_env, arg1, tcg_constant_i32(arg2));\
- } while (0)
-
#define gen_helper_0e2i(name, arg1, arg2, arg3) do { \
gen_helper_##name(cpu_env, arg1, arg2, tcg_constant_i32(arg3));\
} while (0)
@@ -1991,7 +1987,7 @@ static inline void op_ld_##insn(TCGv ret, TCGv arg1, int mem_idx, \
static inline void op_ld_##insn(TCGv ret, TCGv arg1, int mem_idx, \
DisasContext *ctx) \
{ \
- gen_helper_1e1i(insn, ret, arg1, mem_idx); \
+ gen_helper_##insn(ret, cpu_env, arg1, tcg_constant_i32(mem_idx)); \
}
#endif
OP_LD_ATOMIC(ll, ld32s);