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authorPhilippe Mathieu-Daudé2021-05-30 00:39:07 +0200
committerPhilippe Mathieu-Daudé2021-07-02 10:41:15 +0200
commitd507663151daf1b9942a41ea6677ad81aec61012 (patch)
tree11d01fd0dea53893a9648169843327beb26c0b26 /target/mips/tcg/translate.h
parentMerge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210629' into... (diff)
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target/mips: Add declarations for generic TCG helpers
We want to extract the microMIPS ISA and Code Compaction ASE to new compilation units. We will first extract this code as included source files (.c.inc), then make them new compilation units afterward. The following methods are going to be used externally: micromips_translate.c.inc:1778: gen_ldxs(ctx, rs, rt, rd); micromips_translate.c.inc:1806: gen_align(ctx, 32, rd, rs, ... micromips_translate.c.inc:2859: gen_addiupc(ctx, reg, offset, ... mips16e_translate.c.inc:444: gen_addiupc(ctx, ry, offset, ... To avoid too much code churn, it is simpler to declare these prototypes in "translate.h" now. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210617174907.2904067-2-f4bug@amsat.org>
Diffstat (limited to 'target/mips/tcg/translate.h')
-rw-r--r--target/mips/tcg/translate.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h
index 6144259034..c25fad597d 100644
--- a/target/mips/tcg/translate.h
+++ b/target/mips/tcg/translate.h
@@ -146,6 +146,11 @@ void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg);
void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg);
int get_fp_bit(int cc);
+void gen_ldxs(DisasContext *ctx, int base, int index, int rd);
+void gen_align(DisasContext *ctx, int wordsz, int rd, int rs, int rt, int bp);
+void gen_addiupc(DisasContext *ctx, int rx, int imm,
+ int is_64_bit, int extended);
+
/*
* Address Computation and Large Constant Instructions
*/