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author | Fredrik Noring | 2018-10-21 17:37:06 +0200 |
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committer | Aleksandar Markovic | 2018-10-24 15:20:30 +0200 |
commit | 6c1e48d38a2d26cca2d2b00f331a4ac7dbfae3ca (patch) | |
tree | 58403cbea44330788fa562593983d6575b7b52e8 /target/mips/translate.c | |
parent | target/mips: Add a placeholder for R5900 MMI1 instruction subclass (diff) | |
download | qemu-6c1e48d38a2d26cca2d2b00f331a4ac7dbfae3ca.tar.gz qemu-6c1e48d38a2d26cca2d2b00f331a4ac7dbfae3ca.tar.xz qemu-6c1e48d38a2d26cca2d2b00f331a4ac7dbfae3ca.zip |
target/mips: Add a placeholder for R5900 MMI2 instruction subclass
Add a placeholder for MMI2 subclass.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Diffstat (limited to 'target/mips/translate.c')
-rw-r--r-- | target/mips/translate.c | 40 |
1 files changed, 39 insertions, 1 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index 07e33e0701..cc004299a3 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24491,6 +24491,42 @@ static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx) } } +static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opc = MASK_TX79_MMI2(ctx->opcode); + + switch (opc) { + case TX79_MMI2_PMADDW: /* TODO: TX79_MMI2_PMADDW */ + case TX79_MMI2_PSLLVW: /* TODO: TX79_MMI2_PSLLVW */ + case TX79_MMI2_PSRLVW: /* TODO: TX79_MMI2_PSRLVW */ + case TX79_MMI2_PMSUBW: /* TODO: TX79_MMI2_PMSUBW */ + case TX79_MMI2_PMFHI: /* TODO: TX79_MMI2_PMFHI */ + case TX79_MMI2_PMFLO: /* TODO: TX79_MMI2_PMFLO */ + case TX79_MMI2_PINTH: /* TODO: TX79_MMI2_PINTH */ + case TX79_MMI2_PMULTW: /* TODO: TX79_MMI2_PMULTW */ + case TX79_MMI2_PDIVW: /* TODO: TX79_MMI2_PDIVW */ + case TX79_MMI2_PCPYLD: /* TODO: TX79_MMI2_PCPYLD */ + case TX79_MMI2_PMADDH: /* TODO: TX79_MMI2_PMADDH */ + case TX79_MMI2_PHMADH: /* TODO: TX79_MMI2_PHMADH */ + case TX79_MMI2_PAND: /* TODO: TX79_MMI2_PAND */ + case TX79_MMI2_PXOR: /* TODO: TX79_MMI2_PXOR */ + case TX79_MMI2_PMSUBH: /* TODO: TX79_MMI2_PMSUBH */ + case TX79_MMI2_PHMSBH: /* TODO: TX79_MMI2_PHMSBH */ + case TX79_MMI2_PEXEH: /* TODO: TX79_MMI2_PEXEH */ + case TX79_MMI2_PREVH: /* TODO: TX79_MMI2_PREVH */ + case TX79_MMI2_PMULTH: /* TODO: TX79_MMI2_PMULTH */ + case TX79_MMI2_PDIVBW: /* TODO: TX79_MMI2_PDIVBW */ + case TX79_MMI2_PEXEW: /* TODO: TX79_MMI2_PEXEW */ + case TX79_MMI2_PROT3W: /* TODO: TX79_MMI2_PROT3W */ + generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_MMI_CLASS_MMI2 */ + break; + default: + MIPS_INVAL("TX79 MMI class MMI2"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx) { uint32_t opc = MASK_TX79_MMI(ctx->opcode); @@ -24502,10 +24538,12 @@ static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx) case TX79_MMI_CLASS_MMI1: decode_tx79_mmi1(env, ctx); break; + case TX79_MMI_CLASS_MMI2: + decode_tx79_mmi2(env, ctx); + break; case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ - case TX79_MMI_CLASS_MMI2: /* TODO: TX79_MMI_CLASS_MMI2 */ case TX79_MMI_MFHI1: /* TODO: TX79_MMI_MFHI1 */ case TX79_MMI_MTHI1: /* TODO: TX79_MMI_MTHI1 */ case TX79_MMI_MFLO1: /* TODO: TX79_MMI_MFLO1 */ |