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| author | Fredrik Noring | 2018-10-21 17:36:41 +0200 |
|---|---|---|
| committer | Aleksandar Markovic | 2018-10-24 15:20:30 +0200 |
| commit | 88eafe0b28c8e88ed6d38eb27dbf482f9c885745 (patch) | |
| tree | 40e2b3657565def13ef942e5d9cb128207c593bd /target/mips/translate.c | |
| parent | target/mips: Add a placeholder for R5900 MMI instruction class (diff) | |
| download | qemu-88eafe0b28c8e88ed6d38eb27dbf482f9c885745.tar.gz qemu-88eafe0b28c8e88ed6d38eb27dbf482f9c885745.tar.xz qemu-88eafe0b28c8e88ed6d38eb27dbf482f9c885745.zip | |
target/mips: Add a placeholder for R5900 MMI0 instruction subclass
Add a placeholder for MMI0 subclass.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Diffstat (limited to 'target/mips/translate.c')
| -rw-r--r-- | target/mips/translate.c | 43 |
1 files changed, 42 insertions, 1 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index 6cb6966f0f..1a9e43b776 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -24420,15 +24420,56 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx) } } +static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opc = MASK_TX79_MMI0(ctx->opcode); + + switch (opc) { + case TX79_MMI0_PADDW: /* TODO: TX79_MMI0_PADDW */ + case TX79_MMI0_PSUBW: /* TODO: TX79_MMI0_PSUBW */ + case TX79_MMI0_PCGTW: /* TODO: TX79_MMI0_PCGTW */ + case TX79_MMI0_PMAXW: /* TODO: TX79_MMI0_PMAXW */ + case TX79_MMI0_PADDH: /* TODO: TX79_MMI0_PADDH */ + case TX79_MMI0_PSUBH: /* TODO: TX79_MMI0_PSUBH */ + case TX79_MMI0_PCGTH: /* TODO: TX79_MMI0_PCGTH */ + case TX79_MMI0_PMAXH: /* TODO: TX79_MMI0_PMAXH */ + case TX79_MMI0_PADDB: /* TODO: TX79_MMI0_PADDB */ + case TX79_MMI0_PSUBB: /* TODO: TX79_MMI0_PSUBB */ + case TX79_MMI0_PCGTB: /* TODO: TX79_MMI0_PCGTB */ + case TX79_MMI0_PADDSW: /* TODO: TX79_MMI0_PADDSW */ + case TX79_MMI0_PSUBSW: /* TODO: TX79_MMI0_PSUBSW */ + case TX79_MMI0_PEXTLW: /* TODO: TX79_MMI0_PEXTLW */ + case TX79_MMI0_PPACW: /* TODO: TX79_MMI0_PPACW */ + case TX79_MMI0_PADDSH: /* TODO: TX79_MMI0_PADDSH */ + case TX79_MMI0_PSUBSH: /* TODO: TX79_MMI0_PSUBSH */ + case TX79_MMI0_PEXTLH: /* TODO: TX79_MMI0_PEXTLH */ + case TX79_MMI0_PPACH: /* TODO: TX79_MMI0_PPACH */ + case TX79_MMI0_PADDSB: /* TODO: TX79_MMI0_PADDSB */ + case TX79_MMI0_PSUBSB: /* TODO: TX79_MMI0_PSUBSB */ + case TX79_MMI0_PEXTLB: /* TODO: TX79_MMI0_PEXTLB */ + case TX79_MMI0_PPACB: /* TODO: TX79_MMI0_PPACB */ + case TX79_MMI0_PEXT5: /* TODO: TX79_MMI0_PEXT5 */ + case TX79_MMI0_PPAC5: /* TODO: TX79_MMI0_PPAC5 */ + generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_MMI_CLASS_MMI0 */ + break; + default: + MIPS_INVAL("TX79 MMI class MMI0"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx) { uint32_t opc = MASK_TX79_MMI(ctx->opcode); switch (opc) { + case TX79_MMI_CLASS_MMI0: + decode_tx79_mmi0(env, ctx); + break; case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */ case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */ case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */ - case TX79_MMI_CLASS_MMI0: /* TODO: TX79_MMI_CLASS_MMI0 */ case TX79_MMI_CLASS_MMI2: /* TODO: TX79_MMI_CLASS_MMI2 */ case TX79_MMI_MFHI1: /* TODO: TX79_MMI_MFHI1 */ case TX79_MMI_MTHI1: /* TODO: TX79_MMI_MTHI1 */ |