diff options
| author | Matthew Fortune | 2018-10-08 17:42:48 +0200 |
|---|---|---|
| committer | Aleksandar Markovic | 2018-10-18 20:37:20 +0200 |
| commit | fdac60cd0458f34b2e79d74a55bec10836e26471 (patch) | |
| tree | 5d85b28cf197dff7c4057230206365e84251f4e2 /target/mips/translate.c | |
| parent | target/mips: Implement hardware page table walker for MIPS32 (diff) | |
| download | qemu-fdac60cd0458f34b2e79d74a55bec10836e26471.tar.gz qemu-fdac60cd0458f34b2e79d74a55bec10836e26471.tar.xz qemu-fdac60cd0458f34b2e79d74a55bec10836e26471.zip | |
target/mips: Fix emulation of microMIPS R6 <SELEQZ|SELNEZ>.<D|S>
Fix emulation of microMIPS R6 <SELEQZ|SELNEZ>.<D|S> instructions.
Their handling was permuted.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Matthew Fortune <matthew.fortune@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Diffstat (limited to 'target/mips/translate.c')
| -rw-r--r-- | target/mips/translate.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index 159671cbb1..2890219f0b 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -15643,15 +15643,15 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx) case 0x38: /* cmovs */ switch ((ctx->opcode >> 6) & 0x7) { - case MOVN_FMT: /* SELNEZ_FMT */ + case MOVN_FMT: /* SELEQZ_FMT */ if (ctx->insn_flags & ISA_MIPS32R6) { - /* SELNEZ_FMT */ + /* SELEQZ_FMT */ switch ((ctx->opcode >> 9) & 0x3) { case FMT_SDPS_S: - gen_sel_s(ctx, OPC_SELNEZ_S, rd, rt, rs); + gen_sel_s(ctx, OPC_SELEQZ_S, rd, rt, rs); break; case FMT_SDPS_D: - gen_sel_d(ctx, OPC_SELNEZ_D, rd, rt, rs); + gen_sel_d(ctx, OPC_SELEQZ_D, rd, rt, rs); break; default: goto pool32f_invalid; @@ -15665,15 +15665,15 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx) check_insn_opc_removed(ctx, ISA_MIPS32R6); FINSN_3ARG_SDPS(MOVN); break; - case MOVZ_FMT: /* SELEQZ_FMT */ + case MOVZ_FMT: /* SELNEZ_FMT */ if (ctx->insn_flags & ISA_MIPS32R6) { - /* SELEQZ_FMT */ + /* SELNEZ_FMT */ switch ((ctx->opcode >> 9) & 0x3) { case FMT_SDPS_S: - gen_sel_s(ctx, OPC_SELEQZ_S, rd, rt, rs); + gen_sel_s(ctx, OPC_SELNEZ_S, rd, rt, rs); break; case FMT_SDPS_D: - gen_sel_d(ctx, OPC_SELEQZ_D, rd, rt, rs); + gen_sel_d(ctx, OPC_SELNEZ_D, rd, rt, rs); break; default: goto pool32f_invalid; |