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| author | Philippe Mathieu-Daudé | 2021-02-24 18:37:27 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé | 2021-03-13 23:42:31 +0100 |
| commit | 2897579982c3d53e3f808bf1e7cdc465ea0ea421 (patch) | |
| tree | 6959d0ced65544bb24bd4173408e72e20edfcf69 /target/mips | |
| parent | hw/mips/gt64xxx: Trace accesses to ISD registers (diff) | |
| download | qemu-2897579982c3d53e3f808bf1e7cdc465ea0ea421.tar.gz qemu-2897579982c3d53e3f808bf1e7cdc465ea0ea421.tar.xz qemu-2897579982c3d53e3f808bf1e7cdc465ea0ea421.zip | |
target/mips/meson: Introduce mips_tcg source set
Introduce the 'mips_tcg' source set to collect TCG specific files.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210226093111.3865906-2-f4bug@amsat.org>
Diffstat (limited to 'target/mips')
| -rw-r--r-- | target/mips/meson.build | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/target/mips/meson.build b/target/mips/meson.build index 9741545440..75c1652460 100644 --- a/target/mips/meson.build +++ b/target/mips/meson.build @@ -6,12 +6,13 @@ gen = [ ] mips_ss = ss.source_set() -mips_ss.add(gen) mips_ss.add(files( 'cpu.c', 'gdbstub.c', )) -mips_ss.add(when: 'CONFIG_TCG', if_true: files( +mips_tcg_ss = ss.source_set() +mips_tcg_ss.add(gen) +mips_tcg_ss.add(files( 'dsp_helper.c', 'fpu_helper.c', 'lmmi_helper.c', @@ -36,5 +37,7 @@ mips_softmmu_ss.add(when: 'CONFIG_TCG', if_true: files( 'cp0_helper.c', )) +mips_ss.add_all(when: 'CONFIG_TCG', if_true: [mips_tcg_ss]) + target_arch += {'mips': mips_ss} target_softmmu_arch += {'mips': mips_softmmu_ss} |