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author | Philippe Mathieu-Daudé | 2021-01-10 22:41:22 +0100 |
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committer | Philippe Mathieu-Daudé | 2021-01-14 17:13:53 +0100 |
commit | 6648042afb23ad01866af821b5053351a6196ea3 (patch) | |
tree | 71b10334f4f373ec72afc92b5f3c48799f2bf4ad /target/mips | |
parent | target/mips: Convert Rel6 LL/SC opcodes to decodetree (diff) | |
download | qemu-6648042afb23ad01866af821b5053351a6196ea3.tar.gz qemu-6648042afb23ad01866af821b5053351a6196ea3.tar.xz qemu-6648042afb23ad01866af821b5053351a6196ea3.zip |
target/mips: Remove CPU_R5900 definition
Commit 823f2897bdd ("target/mips: Disable R5900 support")
removed the single CPU using the CPU_R5900 definition.
As it is unused, remove it.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210112210152.2072996-2-f4bug@amsat.org>
Diffstat (limited to 'target/mips')
-rw-r--r-- | target/mips/mips-defs.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index 6b8e680011..b7879be9e9 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -61,7 +61,6 @@ #define CPU_MIPS4 (CPU_MIPS3 | ISA_MIPS4) #define CPU_MIPS5 (CPU_MIPS4 | ISA_MIPS5) #define CPU_VR54XX (CPU_MIPS4 | INSN_VR54XX) -#define CPU_R5900 (CPU_MIPS3 | INSN_R5900) #define CPU_LOONGSON2E (CPU_MIPS3 | INSN_LOONGSON2E) #define CPU_LOONGSON2F (CPU_MIPS3 | INSN_LOONGSON2F | ASE_LMMI) |