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| author | Aleksandar Markovic | 2020-10-07 22:37:17 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé | 2020-10-17 11:09:33 +0200 |
| commit | 8a6c9e0fdd10dce2240b2058fdedc5557e36adbd (patch) | |
| tree | d1eae419e55280c3efe7b9b2a9aa68614f3b42a1 /target/mips | |
| parent | target/mips: Fix some comment spelling errors (diff) | |
| download | qemu-8a6c9e0fdd10dce2240b2058fdedc5557e36adbd.tar.gz qemu-8a6c9e0fdd10dce2240b2058fdedc5557e36adbd.tar.xz qemu-8a6c9e0fdd10dce2240b2058fdedc5557e36adbd.zip | |
target/mips: Demacro helpers for <ABS|CHS>.<D|S|PS>
Remove function definitions via macros to achieve better code clarity.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <1602103041-32017-2-git-send-email-aleksandar.qemu.devel@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'target/mips')
| -rw-r--r-- | target/mips/fpu_helper.c | 61 |
1 files changed, 40 insertions, 21 deletions
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c index 56beda49d8..f851723f22 100644 --- a/target/mips/fpu_helper.c +++ b/target/mips/fpu_helper.c @@ -983,27 +983,46 @@ uint32_t helper_float_floor_2008_w_s(CPUMIPSState *env, uint32_t fst0) } /* unary operations, not modifying fp status */ -#define FLOAT_UNOP(name) \ -uint64_t helper_float_ ## name ## _d(uint64_t fdt0) \ -{ \ - return float64_ ## name(fdt0); \ -} \ -uint32_t helper_float_ ## name ## _s(uint32_t fst0) \ -{ \ - return float32_ ## name(fst0); \ -} \ -uint64_t helper_float_ ## name ## _ps(uint64_t fdt0) \ -{ \ - uint32_t wt0; \ - uint32_t wth0; \ - \ - wt0 = float32_ ## name(fdt0 & 0XFFFFFFFF); \ - wth0 = float32_ ## name(fdt0 >> 32); \ - return ((uint64_t)wth0 << 32) | wt0; \ -} -FLOAT_UNOP(abs) -FLOAT_UNOP(chs) -#undef FLOAT_UNOP + +uint64_t helper_float_abs_d(uint64_t fdt0) +{ + return float64_abs(fdt0); +} + +uint32_t helper_float_abs_s(uint32_t fst0) +{ + return float32_abs(fst0); +} + +uint64_t helper_float_abs_ps(uint64_t fdt0) +{ + uint32_t wt0; + uint32_t wth0; + + wt0 = float32_abs(fdt0 & 0XFFFFFFFF); + wth0 = float32_abs(fdt0 >> 32); + return ((uint64_t)wth0 << 32) | wt0; +} + +uint64_t helper_float_chs_d(uint64_t fdt0) +{ + return float64_chs(fdt0); +} + +uint32_t helper_float_chs_s(uint32_t fst0) +{ + return float32_chs(fst0); +} + +uint64_t helper_float_chs_ps(uint64_t fdt0) +{ + uint32_t wt0; + uint32_t wth0; + + wt0 = float32_chs(fdt0 & 0XFFFFFFFF); + wth0 = float32_chs(fdt0 >> 32); + return ((uint64_t)wth0 << 32) | wt0; +} /* MIPS specific unary operations */ uint64_t helper_float_recip_d(CPUMIPSState *env, uint64_t fdt0) |