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authorPhilippe Mathieu-Daudé2021-02-18 09:41:43 +0100
committerPhilippe Mathieu-Daudé2021-03-13 23:42:50 +0100
commit965eb74bb597d4f43dbefa85244891d67634a818 (patch)
treee6a4b899ac34ebb94f6d7d3e018fe5162d0a0194 /target/mips
parenttarget/mips: Remove unused CPUMIPSState* from MXU functions (diff)
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target/mips: Pass instruction opcode to decode_opc_mxu()
In the next commit we'll make decode_opc_mxu() match decodetree prototype by returning a boolean. First pass ctx->opcode as an argument. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210226093111.3865906-7-f4bug@amsat.org>
Diffstat (limited to 'target/mips')
-rw-r--r--target/mips/translate.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 9c06a0df81..8ab0a96a34 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -25780,17 +25780,17 @@ static void decode_opc_mxu__pool19(DisasContext *ctx)
/*
* Main MXU decoding function
*/
-static void decode_opc_mxu(DisasContext *ctx)
+static void decode_opc_mxu(DisasContext *ctx, uint32_t insn)
{
- uint32_t opcode = extract32(ctx->opcode, 0, 6);
+ uint32_t opcode = extract32(insn, 0, 6);
if (opcode == OPC__MXU_MUL) {
uint32_t rs, rt, rd, op1;
- rs = extract32(ctx->opcode, 21, 5);
- rt = extract32(ctx->opcode, 16, 5);
- rd = extract32(ctx->opcode, 11, 5);
- op1 = MASK_SPECIAL2(ctx->opcode);
+ rs = extract32(insn, 21, 5);
+ rt = extract32(insn, 16, 5);
+ rd = extract32(insn, 11, 5);
+ op1 = MASK_SPECIAL2(insn);
gen_arith(ctx, op1, rd, rs, rt);
@@ -26995,7 +26995,7 @@ static bool decode_opc_legacy(CPUMIPSState *env, DisasContext *ctx)
#endif
#if !defined(TARGET_MIPS64)
if (ctx->insn_flags & ASE_MXU) {
- decode_opc_mxu(ctx);
+ decode_opc_mxu(ctx, ctx->opcode);
break;
}
#endif