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authorPhilippe Mathieu-Daudé2020-12-15 00:54:34 +0100
committerPhilippe Mathieu-Daudé2021-01-14 17:13:53 +0100
commitd7efb69382cde8f29cd37df321b399542db9fdd2 (patch)
treed7759917d3476a791cb9089dba563507be54a68d /target/mips
parenttarget/mips/translate: Extract decode_opc_legacy() from decode_opc() (diff)
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target/mips/translate: Expose check_mips_64() to 32-bit mode
To allow compiling 64-bit specific translation code more generically (and removing #ifdef'ry), allow compiling check_mips_64() on 32-bit targets. If ever called on 32-bit, we obviously emit a reserved instruction exception. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <20201215225757.764263-3-f4bug@amsat.org>
Diffstat (limited to 'target/mips')
-rw-r--r--target/mips/translate.c8
-rw-r--r--target/mips/translate.h2
2 files changed, 3 insertions, 7 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c
index d4d5d294f3..7e8afb363a 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -2971,18 +2971,16 @@ static inline void check_ps(DisasContext *ctx)
check_cp1_64bitmode(ctx);
}
-#ifdef TARGET_MIPS64
/*
- * This code generates a "reserved instruction" exception if 64-bit
- * instructions are not enabled.
+ * This code generates a "reserved instruction" exception if cpu is not
+ * 64-bit or 64-bit instructions are not enabled.
*/
void check_mips_64(DisasContext *ctx)
{
- if (unlikely(!(ctx->hflags & MIPS_HFLAG_64))) {
+ if (unlikely((TARGET_LONG_BITS != 64) || !(ctx->hflags & MIPS_HFLAG_64))) {
gen_reserved_instruction(ctx);
}
}
-#endif
#ifndef CONFIG_USER_ONLY
static inline void check_mvh(DisasContext *ctx)
diff --git a/target/mips/translate.h b/target/mips/translate.h
index 1b918a439b..60e59675ef 100644
--- a/target/mips/translate.h
+++ b/target/mips/translate.h
@@ -129,9 +129,7 @@ void generate_exception_end(DisasContext *ctx, int excp);
void gen_reserved_instruction(DisasContext *ctx);
void check_insn(DisasContext *ctx, uint64_t flags);
-#ifdef TARGET_MIPS64
void check_mips_64(DisasContext *ctx);
-#endif
void check_cp0_enabled(DisasContext *ctx);
void check_cp1_enabled(DisasContext *ctx);
void check_cp1_64bitmode(DisasContext *ctx);