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| author | Richard Henderson | 2022-04-21 17:16:53 +0200 |
|---|---|---|
| committer | Richard Henderson | 2022-04-26 17:16:41 +0200 |
| commit | b8f036a9fab6266828546dd127c5535bd535fcda (patch) | |
| tree | 3fda574f9c5d7a0ba80b30da98ca57d9813d68ee /target/nios2/cpu.c | |
| parent | target/nios2: Remove cpu_interrupts_enabled (diff) | |
| download | qemu-b8f036a9fab6266828546dd127c5535bd535fcda.tar.gz qemu-b8f036a9fab6266828546dd127c5535bd535fcda.tar.xz qemu-b8f036a9fab6266828546dd127c5535bd535fcda.zip | |
target/nios2: Split control registers away from general registers
Place the control registers into their own array, env->ctrl[].
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220421151735.31996-23-richard.henderson@linaro.org>
Diffstat (limited to 'target/nios2/cpu.c')
| -rw-r--r-- | target/nios2/cpu.c | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index dc1551241e..fce16a2e77 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -48,14 +48,15 @@ static void nios2_cpu_reset(DeviceState *dev) ncc->parent_reset(dev); - memset(env->regs, 0, sizeof(uint32_t) * NUM_CORE_REGS); + memset(env->regs, 0, sizeof(env->regs)); + memset(env->ctrl, 0, sizeof(env->ctrl)); env->pc = cpu->reset_addr; #if defined(CONFIG_USER_ONLY) /* Start in user mode with interrupts enabled. */ - env->regs[CR_STATUS] = CR_STATUS_U | CR_STATUS_PIE; + env->ctrl[CR_STATUS] = CR_STATUS_U | CR_STATUS_PIE; #else - env->regs[CR_STATUS] = 0; + env->ctrl[CR_STATUS] = 0; #endif } @@ -66,9 +67,9 @@ static void nios2_cpu_set_irq(void *opaque, int irq, int level) CPUNios2State *env = &cpu->env; CPUState *cs = CPU(cpu); - env->regs[CR_IPENDING] = deposit32(env->regs[CR_IPENDING], irq, 1, !!level); + env->ctrl[CR_IPENDING] = deposit32(env->ctrl[CR_IPENDING], irq, 1, !!level); - if (env->regs[CR_IPENDING]) { + if (env->ctrl[CR_IPENDING]) { cpu_interrupt(cs, CPU_INTERRUPT_HARD); } else { cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); @@ -126,8 +127,8 @@ static bool nios2_cpu_exec_interrupt(CPUState *cs, int interrupt_request) CPUNios2State *env = &cpu->env; if ((interrupt_request & CPU_INTERRUPT_HARD) && - (env->regs[CR_STATUS] & CR_STATUS_PIE) && - (env->regs[CR_IPENDING] & env->regs[CR_IENABLE])) { + (env->ctrl[CR_STATUS] & CR_STATUS_PIE) && + (env->ctrl[CR_IPENDING] & env->ctrl[CR_IENABLE])) { cs->exception_index = EXCP_IRQ; nios2_cpu_do_interrupt(cs); return true; @@ -158,7 +159,7 @@ static int nios2_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) } else if (n == 32) { /* PC */ return gdb_get_reg32(mem_buf, env->pc); } else if (n < 49) { /* Status regs */ - return gdb_get_reg32(mem_buf, env->regs[n - 1]); + return gdb_get_reg32(mem_buf, env->ctrl[n - 33]); } /* Invalid regs */ @@ -180,7 +181,7 @@ static int nios2_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) } else if (n == 32) { /* PC */ env->pc = ldl_p(mem_buf); } else if (n < 49) { /* Status regs */ - env->regs[n - 1] = ldl_p(mem_buf); + env->ctrl[n - 33] = ldl_p(mem_buf); } return 4; |