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authorRichard Henderson2022-04-21 17:17:08 +0200
committerRichard Henderson2022-04-26 17:16:41 +0200
commit796945d596058516f3c66f509e1a4804e4ae198a (patch)
tree903974d1f27a1e14b5334497941b997c25d0be57 /target/nios2/cpu.h
parenttarget/nios2: Clean up handling of tlbmisc in do_exception (diff)
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target/nios2: Prevent writes to read-only or reserved control fields
Create an array of masks which detail the writable and readonly bits for each control register. Apply them when writing to control registers, including the write to status during eret. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220421151735.31996-38-richard.henderson@linaro.org>
Diffstat (limited to 'target/nios2/cpu.h')
-rw-r--r--target/nios2/cpu.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 0027416742..da85d82faa 100644
--- a/target/nios2/cpu.h
+++ b/target/nios2/cpu.h
@@ -190,6 +190,11 @@ struct CPUArchState {
int error_code;
};
+typedef struct {
+ uint32_t writable;
+ uint32_t readonly;
+} ControlRegState;
+
/**
* Nios2CPU:
* @env: #CPUNios2State
@@ -213,9 +218,17 @@ struct ArchCPU {
uint32_t reset_addr;
uint32_t exception_addr;
uint32_t fast_tlb_miss_addr;
+
+ /* Bits within each control register which are reserved or readonly. */
+ ControlRegState cr_state[NUM_CR_REGS];
};
+static inline bool nios2_cr_reserved(const ControlRegState *s)
+{
+ return (s->writable | s->readonly) == 0;
+}
+
void nios2_tcg_init(void);
void nios2_cpu_do_interrupt(CPUState *cs);
void dump_mmu(CPUNios2State *env);