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| author | Richard Henderson | 2019-03-23 03:07:57 +0100 |
|---|---|---|
| committer | Richard Henderson | 2019-06-10 16:03:42 +0200 |
| commit | db70b31144d28a40838f8916a7c02adcdf5d8dcd (patch) | |
| tree | 2a6094b53b8078b9550fca465b3560e170a1c7e1 /target/ppc/excp_helper.c | |
| parent | target/openrisc: Use env_cpu, env_archcpu (diff) | |
| download | qemu-db70b31144d28a40838f8916a7c02adcdf5d8dcd.tar.gz qemu-db70b31144d28a40838f8916a7c02adcdf5d8dcd.tar.xz qemu-db70b31144d28a40838f8916a7c02adcdf5d8dcd.zip | |
target/ppc: Use env_cpu, env_archcpu
Cleanup in the boilerplate that each target must define.
Replace ppc_env_get_cpu with env_archcpu. The combination
CPU(ppc_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/ppc/excp_helper.c')
| -rw-r--r-- | target/ppc/excp_helper.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index ec2c177091..50b004d00d 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -49,7 +49,7 @@ void ppc_cpu_do_interrupt(CPUState *cs) static void ppc_hw_interrupt(CPUPPCState *env) { - CPUState *cs = CPU(ppc_env_get_cpu(env)); + CPUState *cs = env_cpu(env); cs->exception_index = POWERPC_EXCP_NONE; env->error_code = 0; @@ -792,7 +792,7 @@ void ppc_cpu_do_interrupt(CPUState *cs) static void ppc_hw_interrupt(CPUPPCState *env) { - PowerPCCPU *cpu = ppc_env_get_cpu(env); + PowerPCCPU *cpu = env_archcpu(env); bool async_deliver; /* External reset */ @@ -931,7 +931,7 @@ static void ppc_hw_interrupt(CPUPPCState *env) * It generally means a discrepancy between the wakup conditions in the * processor has_work implementation and the logic in this function. */ - cpu_abort(CPU(ppc_env_get_cpu(env)), + cpu_abort(env_cpu(env), "Wakeup from PM state but interrupt Undelivered"); } } @@ -974,7 +974,7 @@ static void cpu_dump_rfi(target_ulong RA, target_ulong msr) void raise_exception_err_ra(CPUPPCState *env, uint32_t exception, uint32_t error_code, uintptr_t raddr) { - CPUState *cs = CPU(ppc_env_get_cpu(env)); + CPUState *cs = env_cpu(env); cs->exception_index = exception; env->error_code = error_code; @@ -1015,7 +1015,7 @@ void helper_store_msr(CPUPPCState *env, target_ulong val) uint32_t excp = hreg_store_msr(env, val, 0); if (excp != 0) { - CPUState *cs = CPU(ppc_env_get_cpu(env)); + CPUState *cs = env_cpu(env); cpu_interrupt_exittb(cs); raise_exception(env, excp); } @@ -1026,7 +1026,7 @@ void helper_pminsn(CPUPPCState *env, powerpc_pm_insn_t insn) { CPUState *cs; - cs = CPU(ppc_env_get_cpu(env)); + cs = env_cpu(env); cs->halted = 1; /* @@ -1043,7 +1043,7 @@ void helper_pminsn(CPUPPCState *env, powerpc_pm_insn_t insn) static inline void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr) { - CPUState *cs = CPU(ppc_env_get_cpu(env)); + CPUState *cs = env_cpu(env); /* MSR:POW cannot be set by any form of rfi */ msr &= ~(1ULL << MSR_POW); |