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author | Nikunj A Dadhania | 2017-03-04 15:02:07 +0100 |
---|---|---|
committer | David Gibson | 2017-03-06 03:17:28 +0100 |
commit | 806c9d71abbcd283c0a6d8250e5a6db951ba9494 (patch) | |
tree | 0c187924a2a06797fa6a4ce5d7abd12ecbe22673 /target/ppc/fpu_helper.c | |
parent | spapr: ensure that all threads within core are on the same NUMA node (diff) | |
download | qemu-806c9d71abbcd283c0a6d8250e5a6db951ba9494.tar.gz qemu-806c9d71abbcd283c0a6d8250e5a6db951ba9494.tar.xz qemu-806c9d71abbcd283c0a6d8250e5a6db951ba9494.zip |
target/ppc: fmadd check for excp independently
Current order of checking does not confirm with the spec
(ISA 3.0: MultiplyAddDP page-469). Change the order and make them
independent of each other.
For example: a = infinity, b = zero, c = SNaN, this should set both
VXIMZ and VXNAN
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/fpu_helper.c')
-rw-r--r-- | target/ppc/fpu_helper.c | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 0535ad0814..a547f58e3e 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -747,17 +747,21 @@ static void float64_maddsub_update_excp(CPUPPCState *env, float64 arg1, float64 arg2, float64 arg3, unsigned int madd_flags) { + if (unlikely(float64_is_signaling_nan(arg1, &env->fp_status) || + float64_is_signaling_nan(arg2, &env->fp_status) || + float64_is_signaling_nan(arg3, &env->fp_status))) { + /* sNaN operation */ + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); + } + if (unlikely((float64_is_infinity(arg1) && float64_is_zero(arg2)) || (float64_is_zero(arg1) && float64_is_infinity(arg2)))) { /* Multiplication of zero by infinity */ - arg1 = float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1); - } else if (unlikely(float64_is_signaling_nan(arg1, &env->fp_status) || - float64_is_signaling_nan(arg2, &env->fp_status) || - float64_is_signaling_nan(arg3, &env->fp_status))) { - /* sNaN operation */ - float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1); - } else if ((float64_is_infinity(arg1) || float64_is_infinity(arg2)) && - float64_is_infinity(arg3)) { + float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1); + } + + if ((float64_is_infinity(arg1) || float64_is_infinity(arg2)) && + float64_is_infinity(arg3)) { uint8_t aSign, bSign, cSign; aSign = float64_is_neg(arg1); |