diff options
| author | Matheus Ferst | 2022-05-17 14:39:24 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza | 2022-05-26 22:11:32 +0200 |
| commit | c36ab970ac0ce257a6badb30f6a485a81c2289d2 (patch) | |
| tree | be861d81a0a64ce8d15978fe88f3179e08b5bb6f /target/ppc/translate | |
| parent | target/ppc: declare xscvspdpn helper with call flags (diff) | |
| download | qemu-c36ab970ac0ce257a6badb30f6a485a81c2289d2.tar.gz qemu-c36ab970ac0ce257a6badb30f6a485a81c2289d2.tar.xz qemu-c36ab970ac0ce257a6badb30f6a485a81c2289d2.zip | |
target/ppc: declare xvxsigsp helper with call flags
Move xvxsigsp to decodetree, declare helper_xvxsigsp with
TCG_CALL_NO_RWG, and drop the unused env argument.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220517123929.284511-8-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target/ppc/translate')
| -rw-r--r-- | target/ppc/translate/vsx-impl.c.inc | 18 | ||||
| -rw-r--r-- | target/ppc/translate/vsx-ops.c.inc | 1 |
2 files changed, 17 insertions, 2 deletions
diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index 9b4f309d9d..ca11e2c4b8 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -2151,7 +2151,23 @@ static void gen_xvxexpdp(DisasContext *ctx) tcg_temp_free_i64(xbl); } -GEN_VSX_HELPER_X2(xvxsigsp, 0x00, 0x04, 0, PPC2_ISA300) +static bool trans_XVXSIGSP(DisasContext *ctx, arg_XX2 *a) +{ + TCGv_ptr t, b; + + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_VSX(ctx); + + t = gen_vsr_ptr(a->xt); + b = gen_vsr_ptr(a->xb); + + gen_helper_XVXSIGSP(t, b); + + tcg_temp_free_ptr(t); + tcg_temp_free_ptr(b); + + return true; +} static void gen_xvxsigdp(DisasContext *ctx) { diff --git a/target/ppc/translate/vsx-ops.c.inc b/target/ppc/translate/vsx-ops.c.inc index 52d7ab30cd..4524c5b02a 100644 --- a/target/ppc/translate/vsx-ops.c.inc +++ b/target/ppc/translate/vsx-ops.c.inc @@ -156,7 +156,6 @@ GEN_XX3FORM(xviexpdp, 0x00, 0x1F, PPC2_ISA300), GEN_XX2FORM_EO(xvxexpdp, 0x16, 0x1D, 0x00, PPC2_ISA300), GEN_XX2FORM_EO(xvxsigdp, 0x16, 0x1D, 0x01, PPC2_ISA300), GEN_XX2FORM_EO(xvxexpsp, 0x16, 0x1D, 0x08, PPC2_ISA300), -GEN_XX2FORM_EO(xvxsigsp, 0x16, 0x1D, 0x09, PPC2_ISA300), /* DCMX = bit[25] << 6 | bit[29] << 5 | bit[11:15] */ #define GEN_XX2FORM_DCMX(name, opc2, opc3, fl2) \ |