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| author | LemonBoy | 2020-11-09 10:17:10 +0100 |
|---|---|---|
| committer | David Gibson | 2020-11-24 01:34:18 +0100 |
| commit | afae37d98ae991c0792c867dbd9f32f988044318 (patch) | |
| tree | a1f6a54d2a4ca93da698939832c8fe80b41eac2c /target/ppc | |
| parent | Merge remote-tracking branch 'remotes/awilliam/tags/vfio-update-20201123.0' i... (diff) | |
| download | qemu-afae37d98ae991c0792c867dbd9f32f988044318.tar.gz qemu-afae37d98ae991c0792c867dbd9f32f988044318.tar.xz qemu-afae37d98ae991c0792c867dbd9f32f988044318.zip | |
ppc/translate: Implement lxvwsx opcode
Implement the "Load VSX Vector Word & Splat Indexed" opcode, introduced
in Power ISA v3.0.
Buglink: https://bugs.launchpad.net/qemu/+bug/1793608
Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com>
Message-Id: <d7d533e18c2bc10d924ee3e09907ff2b41fddb3a.1604912739.git.thatlemon@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc')
| -rw-r--r-- | target/ppc/translate/vsx-impl.c.inc | 30 | ||||
| -rw-r--r-- | target/ppc/translate/vsx-ops.c.inc | 1 |
2 files changed, 31 insertions, 0 deletions
diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index b518de46db..075f063e98 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -139,6 +139,36 @@ static void gen_lxvw4x(DisasContext *ctx) tcg_temp_free_i64(xtl); } +static void gen_lxvwsx(DisasContext *ctx) +{ + TCGv EA; + TCGv_i32 data; + + if (xT(ctx->opcode) < 32) { + if (unlikely(!ctx->vsx_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VSXU); + return; + } + } else { + if (unlikely(!ctx->altivec_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VPU); + return; + } + } + + gen_set_access_type(ctx, ACCESS_INT); + EA = tcg_temp_new(); + + gen_addr_reg_index(ctx, EA); + + data = tcg_temp_new_i32(); + tcg_gen_qemu_ld_i32(data, EA, ctx->mem_idx, MO_TEUL); + tcg_gen_gvec_dup_i32(MO_UL, vsr_full_offset(xT(ctx->opcode)), 16, 16, data); + + tcg_temp_free(EA); + tcg_temp_free_i32(data); +} + static void gen_bswap16x8(TCGv_i64 outh, TCGv_i64 outl, TCGv_i64 inh, TCGv_i64 inl) { diff --git a/target/ppc/translate/vsx-ops.c.inc b/target/ppc/translate/vsx-ops.c.inc index 7fd3942b84..1d41beef26 100644 --- a/target/ppc/translate/vsx-ops.c.inc +++ b/target/ppc/translate/vsx-ops.c.inc @@ -5,6 +5,7 @@ GEN_HANDLER_E(lxsibzx, 0x1F, 0x0D, 0x18, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(lxsihzx, 0x1F, 0x0D, 0x19, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(lxsspx, 0x1F, 0x0C, 0x10, 0, PPC_NONE, PPC2_VSX207), GEN_HANDLER_E(lxvd2x, 0x1F, 0x0C, 0x1A, 0, PPC_NONE, PPC2_VSX), +GEN_HANDLER_E(lxvwsx, 0x1F, 0x0C, 0x0B, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(lxvdsx, 0x1F, 0x0C, 0x0A, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(lxvw4x, 0x1F, 0x0C, 0x18, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(lxvh8x, 0x1F, 0x0C, 0x19, 0, PPC_NONE, PPC2_ISA300), |