diff options
| author | Richard Henderson | 2019-06-03 18:49:27 +0200 |
|---|---|---|
| committer | David Gibson | 2019-06-12 02:41:50 +0200 |
| commit | fe2d1696147b905c7bb67283588040576369ded4 (patch) | |
| tree | 1e77ed278ffbe318a541ee3c0891ef657c2e1948 /target/ppc | |
| parent | spapr: Allow hot plug/unplug of PCI bridges and devices under PCI bridges (diff) | |
| download | qemu-fe2d1696147b905c7bb67283588040576369ded4.tar.gz qemu-fe2d1696147b905c7bb67283588040576369ded4.tar.xz qemu-fe2d1696147b905c7bb67283588040576369ded4.zip | |
target/ppc: Use tcg_gen_gvec_bitsel
Replace the target-specific implementation of XXSEL.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20190603164927.8336-1-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc')
| -rw-r--r-- | target/ppc/translate/vsx-impl.inc.c | 24 |
1 files changed, 2 insertions, 22 deletions
diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index cdb44b8b70..e9b7562f84 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -1339,28 +1339,8 @@ static void glue(gen_, name)(DisasContext *ctx) \ VSX_XXMRG(xxmrghw, 1) VSX_XXMRG(xxmrglw, 0) -static void xxsel_i64(TCGv_i64 t, TCGv_i64 a, TCGv_i64 b, TCGv_i64 c) -{ - tcg_gen_and_i64(b, b, c); - tcg_gen_andc_i64(a, a, c); - tcg_gen_or_i64(t, a, b); -} - -static void xxsel_vec(unsigned vece, TCGv_vec t, TCGv_vec a, - TCGv_vec b, TCGv_vec c) -{ - tcg_gen_and_vec(vece, b, b, c); - tcg_gen_andc_vec(vece, a, a, c); - tcg_gen_or_vec(vece, t, a, b); -} - static void gen_xxsel(DisasContext *ctx) { - static const GVecGen4 g = { - .fni8 = xxsel_i64, - .fniv = xxsel_vec, - .vece = MO_64, - }; int rt = xT(ctx->opcode); int ra = xA(ctx->opcode); int rb = xB(ctx->opcode); @@ -1370,8 +1350,8 @@ static void gen_xxsel(DisasContext *ctx) gen_exception(ctx, POWERPC_EXCP_VSXU); return; } - tcg_gen_gvec_4(vsr_full_offset(rt), vsr_full_offset(ra), - vsr_full_offset(rb), vsr_full_offset(rc), 16, 16, &g); + tcg_gen_gvec_bitsel(MO_64, vsr_full_offset(rt), vsr_full_offset(rc), + vsr_full_offset(rb), vsr_full_offset(ra), 16, 16); } static void gen_xxspltw(DisasContext *ctx) |