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| author | Claudio Fontana | 2021-02-04 17:39:18 +0100 |
|---|---|---|
| committer | Richard Henderson | 2021-02-05 21:24:14 +0100 |
| commit | cbc183d2d9f5b8a33c2a6cf9cb242b04db1e8d5c (patch) | |
| tree | c9e34796f87ca99c40721955da1c569c2275ff06 /target/riscv/cpu.c | |
| parent | cpu: move cc->do_interrupt to tcg_ops (diff) | |
| download | qemu-cbc183d2d9f5b8a33c2a6cf9cb242b04db1e8d5c.tar.gz qemu-cbc183d2d9f5b8a33c2a6cf9cb242b04db1e8d5c.tar.xz qemu-cbc183d2d9f5b8a33c2a6cf9cb242b04db1e8d5c.zip | |
cpu: move cc->transaction_failed to tcg_ops
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[claudio: wrap target code around CONFIG_TCG and !CONFIG_USER_ONLY]
avoiding its use in headers used by common_ss code (should be poisoned).
Note: need to be careful with the use of CONFIG_USER_ONLY,
Message-Id: <20210204163931.7358-11-cfontana@suse.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/riscv/cpu.c')
| -rw-r--r-- | target/riscv/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 345b78fc3d..9a23af9a9d 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -609,7 +609,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) cc->gdb_stop_before_watchpoint = true; cc->disas_set_info = riscv_cpu_disas_set_info; #ifndef CONFIG_USER_ONLY - cc->do_transaction_failed = riscv_cpu_do_transaction_failed; + cc->tcg_ops.do_transaction_failed = riscv_cpu_do_transaction_failed; cc->do_unaligned_access = riscv_cpu_do_unaligned_access; cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug; /* For now, mark unmigratable: */ |